LW04 Search Results

A115-A

Abstract: C101 SN54LV4040A SN74LV4040A LW04 lw040a
Contextual Info: SN54LV4040A, SN74LV4040A 12-BIT ASYNCHRONOUS BINARY COUNTERS SCES226G – APRIL 1999 – REVISED AUGUST 2003 QL QF QE QG QD QC QB GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QK QJ QH QI CLR CLK QA QF QE QG QD QC QB 16 15 3 14 4 13 5 12 6 11 10 7 8 9 QK

Contextual Info: SN54LV4040A, SN74LV4040A 12-BIT ASYNCHRONOUS BINARY COUNTERS SCES226F – APRIL 1999 – REVISED SEPTEMBER 2002 QL QF QE QG QD QC QB GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QK QJ QH QI CLR CLK QA QF QE QG QD QC QB 16 15 3 14 4 13 5 12 6 11 10 7 8 9

Contextual Info: SN54LV4040A, SN74LV4040A 12-BIT ASYNCHRONOUS BINARY COUNTERS SCES226F – APRIL 1999 – REVISED SEPTEMBER 2002 QL QF QE QG QD QC QB GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QK QJ QH QI CLR CLK QA QF QE QG QD QC QB 16 15 3 14 4 13 5 12 6 11 10 7 8 9

LW040A

Abstract: A115-A C101 SN74LV4040A SN74LV4040AMPWREP
Contextual Info: SN74LV4040A-EP 12 BIT ASYNCHRONOUS BINARY COUNTERS www.ti.com SGDS030 – SEPTEMBER 2007 FEATURES 1 • • • • • • • • • • • • • 1 Controlled Baseline – One Assembly – Test Site – One Fabrication Site Extended Temperature Performance of –55°C

Contextual Info: SN54LV4040A, SN74LV4040A 12ĆBIT ASYNCHRONOUS BINARY COUNTERS SCES226I − APRIL 1999 − REVISED MAY 2005 D Individual Switch Controls D Extremely Low Input Current D Ioff Supports Partial-Power-Down Mode <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV Output VOH Undershoot

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

SN74LV4040AN

Abstract: A115-A C101 SN54LV4040A SN74LV4040A
Contextual Info: SN54LV4040A, SN74LV4040A 12ĆBIT ASYNCHRONOUS BINARY COUNTERS SCES226H − APRIL 1999 − REVISED DECEMBER 2004 D Individual Switch Controls D Extremely Low Input Current D Ioff Supports Partial-Power-Down Mode <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV Output VOH Undershoot

A115-A

Abstract: C101 SN54LV4040A SN74LV4040A marking QJ 45
Contextual Info: SN54LV4040A, SN74LV4040A 12-BIT ASYNCHRONOUS BINARY COUNTERS SCES226C – APRIL 1999 – REVISED JANUARY 2001 D D D D D D D QL QF QE QG QD QC QB GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QK QJ QH QI CLR CLK QA SN54LV4040A . . . FK PACKAGE TOP VIEW QE

Contextual Info: SN54LV4040A, SN74LV4040A 12-BIT ASYNCHRONOUS BINARY COUNTERS SCES226D – APRIL 1999 – REVISED NOVEMBER 2001 D D D D D D D QL QF QE QG QD QC QB GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QK QJ QH QI CLR CLK QA SN54LV4040A . . . FK PACKAGE TOP VIEW

74lv4046

Abstract: SN74LV4046AD LV4046A SN74LV4046A LV4046 SN74LV4046APWR
Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656B – FEBRUARY 2006 – REVISED AUGUST 2006 FEATURES • • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

Contextual Info: SN54LV4040A, SN74LV4040A 12ĆBIT ASYNCHRONOUS BINARY COUNTERS SCES226I − APRIL 1999 − REVISED MAY 2005 D Individual Switch Controls D Extremely Low Input Current D Ioff Supports Partial-Power-Down Mode <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV Output VOH Undershoot

Contextual Info: SN54LV4040A, SN74LV4040A 12ĆBIT ASYNCHRONOUS BINARY COUNTERS SCES226I − APRIL 1999 − REVISED MAY 2005 D Individual Switch Controls D Extremely Low Input Current D Ioff Supports Partial-Power-Down Mode <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV Output VOH Undershoot

74lv4046

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

LW040A

Abstract: SN74LV4040AN A115-A C101 SN54LV4040A SN74LV4040A
Contextual Info: SN54LV4040A, SN74LV4040A 12ĆBIT ASYNCHRONOUS BINARY COUNTERS SCES226I − APRIL 1999 − REVISED MAY 2005 D Individual Switch Controls D Extremely Low Input Current D Ioff Supports Partial-Power-Down Mode <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV Output VOH Undershoot

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

Contextual Info: SN54LV4040A, SN74LV4040A 12ĆBIT ASYNCHRONOUS BINARY COUNTERS SCES226I − APRIL 1999 − REVISED MAY 2005 D Individual Switch Controls D Extremely Low Input Current D Ioff Supports Partial-Power-Down Mode <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV Output VOH Undershoot

TF 241

Abstract: LW040A A115-A C101 SN54LV4040A SN74LV4040A
Contextual Info: SN54LV4040A, SN74LV4040A 12-BIT ASYNCHRONOUS BINARY COUNTERS SCES226F – APRIL 1999 – REVISED SEPTEMBER 2002 QL QF QE QG QD QC QB GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QK QJ QH QI CLR CLK QA QF QE QG QD QC QB 16 15 3 14 4 13 5 12 6 11 10 7 8 9

LW046A

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

Contextual Info: SN74LV4040A-EP 12 BIT ASYNCHRONOUS BINARY COUNTERS w w w .t i.c om SGDS030 – SEPTEMBER 2007 FEATURES 1 • • • • • • • • • • • • • 1 Controlled Baseline – One Assembly – Test Site – One Fabrication Site Extended Temperature Performance of –55°C

Contextual Info: SN74LV4040A-EP 12 BIT ASYNCHRONOUS BINARY COUNTERS www.ti.com SGDS030 – SEPTEMBER 2007 FEATURES 1 • • • • • • • • • • • • • 1 Controlled Baseline – One Assembly – Test Site – One Fabrication Site Extended Temperature Performance of –55°C

Contextual Info: SN54LV4040A, SN74LV4040A 12ĆBIT ASYNCHRONOUS BINARY COUNTERS SCES226I − APRIL 1999 − REVISED MAY 2005 D Individual Switch Controls D Extremely Low Input Current D Ioff Supports Partial-Power-Down Mode <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV Output VOH Undershoot

Texas Instruments TTL

Abstract: ALVC16425 CD4066B spice model LVT - Low-Voltage BiCMOS Technology working principle of ic cd4066 CD4054B SCHEMATIC AND PIN DETAILS TI audio squelch can CU384A CD4053 spice MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR
Contextual Info: Signal Switch Including Digital/Analog/Bilateral Switches and Voltage Clamps Data Book Introducing Three New Bus-Switch Families S CB3Q High-Bandwidth Bus Switch S CB3T Low-Voltage Translator Bus Switch S CBT- C Bus Switch With –2-V Undershoot Protection

Contextual Info: SN54LV4040A, SN74LV4040A 12ĆBIT ASYNCHRONOUS BINARY COUNTERS SCES226I − APRIL 1999 − REVISED MAY 2005 D Individual Switch Controls D Extremely Low Input Current D Ioff Supports Partial-Power-Down Mode <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV Output VOH Undershoot