MARKING D1B Search Results

A09 N03 MOSFET

Abstract: marking B3A sot23-5 t7G SOT23-6 marking H2A sot-23 ADM2004 marking moy sot-23 A06 N03 MOSFET SOT23-5 D2Q M05 SOT-23 M2A MARKING SOT-23
Contextual Info: Tiny Part Number Cross Reference Package Marking Model Function Package Description Package Marking Model Function Package Description 0Axx 0Bxx 2A0A 2B0A 2C0A 3A0A 3B0A 3C0A 4A0A 4B0A 4C0A 5A0A 5B0A 5C0A 9Jxx 9Lxx 9Mxx 9Rxx 9Sxx 9Txx 9Zxx A00 A01 A02 A04

485G

Abstract: PRBS23
Contextual Info: NB7VPQ16M 1.8V/2.5V CML 12.5 Gbps Programmable Pre-Emphasis Copper/Cable Driver with Selectable Equalizer Receiver http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM* Description 16 The NB7VPQ16M is a high performance single channel

Contextual Info: NB7VPQ16M 1.8V/2.5V CML 12.5 Gbps Programmable Pre-Emphasis Copper/Cable Driver with Selectable Equalizer Receiver http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM* Description 16 The NB7VPQ16M is a high performance single channel

Contextual Info: SIEMENS BCR 158W PNP Silicon Digital Transistor >Switching circuit, inverter, interface circuit, driver circuit « Built in bias resistor R1=2.2ki2, R2=47kfl Ordering Code Pin Configuration WIs UPON INQUIRY 1= B Package 2= E o tl Marking BCR 158W CO Type

Contextual Info: SIEMENS PNP Silicon Switching Transistor SMBT 3906 • High DC current gain: 0.1 mA to 100 mA • Low collector-emitter saturation voltage • Complementary type: SMBT 3904 NPN Type Marking Ordering Code (tape and reel) PinCtonfigu ration 1 2 3 Package1)

Contextual Info: SIEMENS BCR 196 PNP Silicon Digital Transistor >Switching circuit, inverter, interface circuit, driver circuit >Built in bias resistor Ri=47k£2, R2=22kfl Marking Ordering Code Pin Configuration BCR 196 WXs 1 =B Package UJ II <M UPON INQUIRY o II CO Type

Contextual Info: SIEMENS NPN Silicon Darlington Transistor BC 517 • High current gain • High collector current • Complementary type: BC 516 PNP Type Marking Ordering Code P inC onfigur ation 1 2 3 Package1) BC 517 - Q62702-C825 C TO-92 B E Maximum Ratings Parameter

Contextual Info: SIEMENS BCR 553 PNP Silicon Digital Transistor • Switching circuit, inverter, interface circuit, driver circuit • Built in bias resistor R-|=2.2k£i, Ft2=2.2k£2 ^ FI 4 a r ^ r z Type Marking Ordering Code Pin Configuration BCR 553 XBs 1=B Q62702-C2371

Contextual Info: SIEM ENS BAR 80 Silicon RF Switching Diode • • • Design for use in shunt configuration Hight shunt signal isolation Low shunt insertion loss Type BAR 80 Marking AAs Ordering code tape and reel Package 1) Pin configuration 1 2 3 Q62702-A1084 C A 4 A

Contextual Info: BSS 7728 In fin e o n technologies SIPMOS Small-Signal Transistor b • N channel 7 y SX/N. • Enhancement mode • '|/GS(tti = 1-°—2.5V 1 Pin 1 VPS05557 Pin 2 G Pin 3 S Type Vds fe f lDS(on) Package Marking BSS 7728 60 V 0.15 A 7.5 £1 SOT-23 sSJ

TRANSISTOR BC 187

Abstract: PC99 RECS-80 W83697SF W83877TF ISO7816
Contextual Info: W83697SF WINBOND I/O W83697SF Data Sheet Revision History Pages Dates Version Version Main Contents on Web 1 n.a. 04/16/01 0.50 0.50 First published 2 111 04/27/01 0.51 0.51 Update the Top Marking 3 4 5 6 7 8 9 10 Please note that all data and specifications are subject to change without notice. All the

Contextual Info: W83697SF WINBOND I/O W83697SF Data Sheet Revision History Pages Dates Version Version Main Contents on Web 1 n.a. 04/16/01 0.50 0.50 First published 2 111 04/27/01 0.51 0.51 Update the Top Marking 3 4 5 6 7 8 9 10 Please note that all data and specifications are subject to change without notice. All the

SCL4000B

Contextual Info: 4508B INTERNATIONAL, INC CMOS DUAL 4-BIT LATCH FEATURES ♦ ♦ ♦ ♦ Two Independent Four-Bit Latches 3-State Outputs Direct Reset All Inputs Buffered CONNECTION DIAGRAM alt packages Q3g Q2g Q1 B QOg Disg MRg D3B D1B I d o b 1 D2B stb I V DD l 1 1 1 _L_J_I_ _i_L_

FREESCALE MARKING CODE 8 SOIC

Abstract: FREESCALE Lot Code Identification capacitor cross reference freescale marking codes SEL
Contextual Info: Freescale Semiconductor, Inc. Order number: MC100ES6056 Rev 3, 06/2004 TECHNICAL DATA 2.5V / 3.3V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew

FREESCALE Lot Code Identification

Abstract: FREESCALE MARKING CODE 8 SOIC freescale marking codes SEL
Contextual Info: MOTOROLA Freescale Semiconductor, Inc.Order Number: MC100ES6056/D Rev 0, 05/2003 SEMICONDUCTOR TECHNICAL DATA Freescale Semiconductor, Inc. Preliminary Information 2.5V / 3.3V ECL/PECL/HSTL/ LVDS Dual Differential 2:1 Multiplexer The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock

Contextual Info: MOTOROLA Order Number: MC100ES6056/D Rev 0, 05/2003 SEMICONDUCTOR TECHNICAL DATA Preliminary Information 2.5V / 3.3V ECL/PECL/HSTL/ LVDS Dual Differential 2:1 Multiplexer The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock

251A172

Abstract: 250A783 4927N 251A172-417 F1192M-95 1RU44 512KX32 251A137 270 uf 375v T1A 250v
Contextual Info: REVISIONS R E L or E C O D E S C R I P T I O N REV ECO EOA20188 A D A T E Refer to Document Change History Herein 01-19-04 A P P R O V E D K. Mason NOTES: 1. This is a TOP LEVEL DRAWING TLD . 2. BAE SYSTEMS - Manassas, VA reference only. 3. All sheets are the same revision status.

timmer

Abstract: fet Marking M3 GH mosfet TK61220A HQFN4040-24
Contextual Info: TK61220A DCDC Controller, Independent 2ch, Step-up, Inductive DCDCコントローラ､独立動作2ch､昇圧､インダクティブ Feature „ Each channel can be operated independently „ 個別独立動作可能 „ External n-channel power MOSFET „ パワートランジスタ外付け

VCC-1220

Abstract: MC100ES6056 MC100ES6056DT MC100ES6056DTR2 MC100ES6056DW MC100ES6056DWR2 TSSOP-20 motorola marking code 8 lead soic package marking code motorola ic motorola lot code marking
Contextual Info: MOTOROLA Order Number: MC100ES6056 Rev 1, 12/2003 SEMICONDUCTOR TECHNICAL DATA 2.5V / 3.3V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer MC100ES6056 The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew

tracecode

Abstract: ww38 MC100ES6056 MC100ES6056DT MC100ES6056DTR2 MC100ES6056DW MC100ES6056DWR2 TSSOP-20 motorola marking code 8 lead soic package marking code motorola ic
Contextual Info: Freescale Semiconductor, Inc. MOTOROLA Order number: MC100ES6056 Rev 3, 5/2004 SEMICONDUCTOR TECHNICAL DATA Freescale Semiconductor, Inc. 2.5V / 3.3V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer MC100ES6056 The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The

WW47

Contextual Info: MOTOROLA Order number: MC100ES6056 Rev 3, 5/2004 SEMICONDUCTOR TECHNICAL DATA 2.5V / 3.3V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or

251A137

Abstract: 512KX40 251A137-517 4927N w26m 251a137-527 251A137-101-PS001 EOA20156 BAE 0002 BAE Systems 251A137
Contextual Info: REVISIONS R E L or E C O D E S C R I P T I O N REV ECO EOA20156 G D A T E Refer to Document Change History herein 01-19-04 A P P R O V E D K. Mason NOTES: 1. This is a TOP LEVEL DRAWING TLD . 2. BAE SYSTEMS - Manassas, VA reference only. 3. All sheets are the same revision status.

5962-8672801FA

Abstract: 25S09 25S09/BEA qml-38535 H 050127
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 05-01-27 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268

E142 wafer format

Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Contextual Info: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved”