MC100EP196A Search Results
MC100EP196A Datasheets Context Search
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Contextual Info: MC100EP196A 3.3 V ECL Programmable Delay Chip With FTUNE The MC100EP196A is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar architecture to the EP195 with the added feature of further |
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MC100EP196A MC100EP196A EP195 EP196A MC100EP196A/D |