ML65 Search Results

74FCT244

Abstract: ML65244 ML65244CK ML65244CS ML65L244 ML65L244CK
Contextual Info: August 1996 ML65244/ML65L244 High Speed Dual Quad Buffer/Line Drivers GENERAL DESCRIPTION FEATURES The ML65244 and ML65L244 are non-inverting dual quad buffer/line drivers. The high operating frequency 50MHz driving a 50pF load and low propagation delay

Contextual Info: M ay 1997 MgL Micro Linear ML6518 18 Line Hot-Insertable Active SCSI Terminator GENERAL DESCRIPTION FEATURES The ML6518 BiC M O S 18 line SCSI terminator provides active termination in SCSI systems using single-ended drivers and receivers. Active SCSI termination helps to

F-100

Abstract: ML6553 ML6553CS-1
Contextual Info: www.fairchildsemi.com ML6553 Bus Termination Regulator Features General Description • Can source and sink up to 1A • Generates termination voltages for DDR SDRAM, SSTL_2 SDRAM, SGRAM, or equivalent memories • Generates termination voltages for active termination

74FCT245

Abstract: FCT245 ML65245 ML65245CK ML65L245 R4000 mips r4000
Contextual Info: August 1996 ML65245*/ML65L245* High Speed Octal Buffer Transceivers GENERAL DESCRIPTION FEATURES The ML65245 and ML65L245 are non-inverting octal transceivers. The high operating frequency 50MHz driving a 50pF load and low propagation delay (ML65245 – 1.7ns, ML65L245 – 2ns) make them ideal for

SMD 7014

Contextual Info: www.fairchildsemi.com ML6554 3A Bus Termination Regulator Features Description • Can source and sink up to 3A, no heat sink required • Integrated Power MOSFETs • Generates termination voltages for DDR SDRAM, SSTL-2 SDRAM, SGRAM, or equivalent memories

analog devices clx

Contextual Info: March 1997 ML6510 Series Programmable Adaptive Clock Manager PACMan GENERAL DESCRIPTION FEATURES The ML6510 (Super PACMan™) is a Programmable Adaptive Clock Manager which offers an ideal solution for managing high speed synchronous clock distribution in

74FCT244

Abstract: ML65244 ML65244CK ML65244CS ML65L244 ML65L244CK ML65L244CS
Contextual Info: August 1996 ML65244/ML65L244 High Speed Dual Quad Buffer/Line Drivers GENERAL DESCRIPTION FEATURES The ML65244 and ML65L244 are non-inverting dual quad buffer/line drivers. The high operating frequency 50MHz driving a 50pF load and low propagation delay

Contextual Info: May 1997 ML6518 18 Line Hot-Insertable Active SCSI Terminator GENERAL DESCRIPTION FEATURES The ML6518 BiCMOS 18 line SCSI terminator provides active termination in SCSI systems using single-ended drivers and receivers. Active SCSI termination helps to effectively control analog transmission line effects such as

FCT245

Abstract: ML65T245CK ML65T245CS analog buffers
Contextual Info: May 1997 ML65T245 3.3V High Speed Octal Buffer Transceiver GENERAL DESCRIPTION FEATURES The ML65T245 is a non-inverting octal buffer transceiver. The high operating frequency 66MHz driving a 50pF load and low propagation delay (2ns) make it ideal for very high speed applications such as processor bus

Contextual Info: March 1997 ro Linear ML6500 Programmable Adaptive Clock Manager PACMan GENERAL DESCRIPTION FEATURES The ML6500 (PACMan™) is a Programmable Adaptive Clock Manager which offers an ideal solution for managing high speed synchronous clock distribution in

M1-6508

Abstract: M16508 ML6508CQ
Contextual Info: March J997 % M i c r o L in e a r ML6508 Programmable Adaptive Clock Manager PACMan GENERAL DESCRIPTION FEATURES The ML6508 is a Programmable Adaptive Clock Manager which offers an ideal solution forma nag ng high speed synchronous clock distribution in next generation, high

Contextual Info: JUL 2 e 1993 May 1993 ADVANCED INFORMATION Micro Linear M L 6 5 00/08 Programmable Adaptive Clock Manager PACMan G EN ERA L D ESCR IPTIO N FEATURES The Programmable Adaptive Clock Manager (PACMan™), ML6500 is a single chip PLL clock generator that provides

Contextual Info: September 1994 Micro Linear ML6509 Active SCSI Terminator GENERAL DESCRIPTION FEATURES The ML6S09 BiCMOS SCSI terminator provides active termination in a SCSI system with single-ended drivers and receivers, in full compliance with the SCSI-1, SCSI-2 and SCSI-3 recommendations. It provides a 2.85V

Contextual Info: February 1997 ugL Micro Linear ML6599 Hot-lnsertable Active SCSI Terminator GENERAL DESCRIPTION FEATURES The ML6599 BiCMOS 9 line SCSI terminator provides active termination in SCSI systems using single ended drivers and receivers. Active SCSI termination helps to

Contextual Info: March 1997 MgL Micro Linear ML6500 Programmable Adaptive Clock Manager PACMan GENERAL DESCRIPTION FEATURES The M L6500 (PACM an™) is a Programmable Adaptive Clock Manager which offers an ideal solution for managing high speed synchronous clock distribution in

ml6554

Abstract: ML6554CU ML6554IU P0751 os-con spec SMP3316-331M PANASONIC SURFACE MOUNT RESISTORS LAND PATTERN
Contextual Info: www.fairchildsemi.com ML6554 3A Bus Termination Regulator Features Description • Can source and sink up to 3A, no heat sink required • Integrated Power MOSFETs • Generates termination voltages for DDR SDRAM, SSTL-2 SDRAM, SGRAM, or equivalent memories

marking code lx diode

Abstract: marking code ce SOT23 10uF CAPACITOR 35V tantalum TANTALUM capacitor, .10uF 35V 1N5817 1N5819 ML65 marking code lx sot SOT89 MARKING CODE B2
Contextual Info: ML65 ML65 Series DC-DC Converter Features General Description Small number of external components: inductor, diode and capacitor. Ultra low input current : Typical 6uA Output Voltage Accuracy : +/- 2.5 % Low ripple and noise Low startup voltage : Max 0.9V with 1mA input

L6518

Contextual Info: November 1995 PRELIM IN ARY MÉLMicro Linear ML6518 18 Line Hot-lnsertable Active SCSI Terminator GENERAL DESCRIPTION FEATURES The ML6518 BiC M O S 18 line SCSI terminator provides active termination in SCSI systems using single-ended drivers and receivers. Active SCSI termination helps to

Contextual Info: June 1998 PRELIM INARY Micro Linear ML65F16245 16-Bit Bidirectional Transceiver with 3-State Outputs G EN ER A L D ESC R IP T IO N FEA T U R ES The ML65F16245 is a BiCMOS, non-inverting 16-bit transceiver with 3-state outputs. This device was specifically designed for high speed bus applications. Its

f85 diode

Contextual Info: %^ M icro Linear September 1996 PRELIM INARY ML65T541 3.3V High Speed Octal Buffer/Line Driver GENERAL DESCRIPTION FEATURES The ML65T541 is a non-inverting octal buffer/line driver. The high operating frequency 66M Hz driving a 50pF load and low propagation delay (2ns) make it ideal for

Contextual Info: September 1997 PRELIM INARY Micro Linear ML6516245 16-Bit Bidirectional Transceiver with 3-State Outputs GENERAL DESCRIPTION FEATURES The ML6516245 is a BiCMOS, non-inverting 16-bit transceiver with 3-state outputs. This device was specifically designed for high speed bus applications. Its

2SV820M

Abstract: ML6554 ML6554CU P0751 TPSE337M006R0100
Contextual Info: November 1999 PRELIMINARY FEATURING P POWER SO ance High-Perform age ipation Pack Thermal Diss ML6554 3A Bus Termination Regulator GENERAL DESCRIPTION FEATURES The ML6554 switching regulator is designed to convert voltage supplies ranging from 2.3V to 4V into a desired

l6510

Contextual Info: March 1997 % M i c r o L in e a r ML6510 Series Programmable Adaptive Clock Manager PACMan GENERAL DESCRIPTION FEATURES The ML6510 (Super PACM an™) is a Programmable Adaptive Clock Manager which offers an ideal solution for managing high speed synchronous clock distribution in

Contextual Info: March 1997 PRELIM INARY ^Ék Micro Linear ML6550 Bus Termination Regulator GEN ERAL D ESCRIPTION FEATURES The ML6550 is a switching regulator designed to convert a 5V supply to 2.5V, or a 3.3V supply to 1,65V, for series termination of high speed graphic/video memory buses or