MT58C1289 Search Results

synchronous sram

Abstract: mt58c1289dj MT58C1289
Contextual Info: v/iic z r o n MT58C1289 128K X 9 SYNCHRONOUS SRAM 128K x 9 SRAM SYNCHRONOUS SRAM FULLY REGISTERED INPUTS AND OUTPUTS FEATURES Timing specific to SPARC microprocessor Fast access times: 16.6 and 20ns Fast clock to data valid: 10ns Single +5V ±10% power supply

jc 817

Abstract: ir 0588 0588 N1H1
Contextual Info: niCRON SEMICONDUCTOR INC b?E hi 1 1 5 ^ D 000^7^3 MRN S11A I 128K X 9 SRAM DIE | M IC R O N SEMICONDUCTOR tSC M 073 • SRAM DIE 128K X 9 SRAM Asynchronous MT5C1189S11A and Synchronous (MT58C1289S11A) GENERAL PHYSICAL SPECIFICATIONS • Wafer thickness = 18.5 mils ±0.5 mils

Contextual Info: MICRON SEM ICO NDUCTOR INC M IC R O b7E D • b l l l S ^ □□□'ÌS31 TbM ■ URN MT58C1289 128K X 9 SYNCHRONOUS SRAM N SYNCHRONOUS 128K x 9 SRAM CD AM o n A M VI FULLY REGISTERED INPUTS AND OUTPUTS FEATURES Timing specific to SPARC microprocessor Fast cycle times: 12,16.6 and 20ns

synchronous sram

Abstract: 05t cr
Contextual Info: MICRO N T E C H N O L O G Y INC S5E D M IC R O N • b i l l 54*1 D D D 3 b 3 T 7T2 « M R N 128K X MT58C1289 9 SYNCHRONOUS SRAM 128K X 9 SRAM SYNCHRONOUS SRAM FULLY REGISTERED INPUTS AND OUTPUTS FEATURES Timing specific to SPARC microprocessor Fast access times: 16.6 and 20ns

Contextual Info: |U |I C R O N 128K X M T 58C 1289 9 S Y N C H R O N O U S SRAM 128K x 9 SRAM SYNCHRONOUS SRAM FULLY REGISTERED INPUTS AND OUTPUTS FEATURES PIN ASSIGNMENT Top View T im ing specific to SPARC m icroprocessor Fast cycle times: 12,16.6 and 20ns Fast clock to d ata valid: 6, 8 and 10ns

AAA1M304

Abstract: tc514256 UM6164 um6164b DYNAMIC RAM CROSS REFERENCE tc554256 M5M44C256 MB82005 NMB Semiconductor IS61C256A
Contextual Info: Cross Reference & Fast Static RAM Vendor Cypress Fujitsu Hitachi IDT ISSI Micron Mltsubish P/N Alliance P/N Description P/N Alliance P/N CY7C106 AS7C1028 256K x 4 MCM32A32 AS7M32D128 128K module CY7C185 AS7C164 8Kx8 MCM32A64 AS7M32D256 256K module CY7C188

Contextual Info: ADVANCE |U|ICRON M T58C 1289 FULLY REGISTERED INPUTS AND OUTPUTS FEATURES • • • • • • • • Timing specific to SPARC'"' microprocessor Fast access times: 16.6 and 20ns Fast clock to data valid: 10ns Single +5V ±10% power supply READ data and WRITE data registers