MX23L256 Search Results
MX23L256 Datasheets (3)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| MX23L25611 |
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256M-BIT (16M x 16 / 32M x 8) MASK ROM WITH PAGE MODE (SSOP ONLY) | Original | 180.97KB | 7 | ||
| MX23L25611MC-10 |
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256M-BIT (16M x 16 / 32M x 8) MASK ROM WITH PAGE MODE (SSOP ONLY) | Original | 180.97KB | 7 | ||
| MX23L25611MC-12 |
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256M-BIT (16M x 16 / 32M x 8) MASK ROM WITH PAGE MODE (SSOP ONLY) | Original | 180.97KB | 7 |
MX23L256 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
MX23L256Contextual Info: PRELIMINARY MX23L25640 256M-BIT NAND INTERFACE MASK ROM DESCRIPTION The MX23L25640 is a 256 Mbit NAND interface programmable mask read-only memory that operates with a single power supply. The memory organization consists of 512 + 16 (Redundancy bytes x 32 pages x |
Original |
MX23L25640 256M-BIT MX23L25640 48-pin 44-pin 576Note 16Note) 512Note) MX23L256 | |
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Contextual Info: MX23L25610 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (TSOP ONLY) FEATURES • Current - Operating: 30mA (max.) @ 5MHz - Standby: 15uA (max.) • Supply voltage - 3.0V ~ 3.6V • Package - 56 pin TSOP • Temperature - 0~70°C • Bit organization |
Original |
MX23L25610 256M-BIT 100ns D15/A-1 FEB/04/2002 NOV/22/2002 APR/03/2003 APR/24/2003 MAY/08/2003 PM0873 | |
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Contextual Info: MX23L25611 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (SSOP ONLY) FEATURES • Bit organization - 32M x 8 (byte mode) - 16M x 16 (word mode) • Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) • Page Size - 8 words per page |
Original |
MX23L25611 100ns 256M-BIT SEP/06/2001 SEP/07/2001 FEB/01/2002 NOV/21/2002 PM0822 | |
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Contextual Info: PRELIMINARY MX23L25610 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (TSOP ONLY) FEATURES • Current - Operating: 30mA (max.) @ 5MHz - Standby: 15uA (max.) • Supply voltage - 2.7V ~ 3.6V • Package - 56 pin TSOP • Temperature - 0~70°C • Bit organization |
Original |
MX23L25610 256M-BIT 100ns 100ns 50mA-- FEB/04/2002 PM0873 | |
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Contextual Info: MX23L25611 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (SSOP ONLY) FEATURES • Bit organization - 32M x 8 (byte mode) - 16M x 16 (word mode) • Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) • Page Size - 8 words per page |
Original |
MX23L25611 100ns 256M-BIT | |
MX23L256
Abstract: 23L25611-10 MX23L25611 MX23L25611MC-10 MX23L25611MC-12
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Original |
MX23L25611 256M-BIT 100ns MX23L256 23L25611-10 MX23L25611 MX23L25611MC-10 MX23L25611MC-12 | |
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Contextual Info: PRELIMINARY MX23L25640 256M-BIT NAND INTERFACE MASK ROM DESCRIPTION The MX23L25640 is a 256 Mbit NAND interface programmable mask read-only memory that operates with a single power supply. The memory organization consists of 512 + 16 (Redundancy bytes x 32 pages x |
Original |
MX23L25640 256M-BIT MX23L25640 48-pin 44-pin 576Note 16Note) 512Note) | |
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Contextual Info: PRELIMINARY MX23L25640 256M-BIT NAND INTERFACE MASK ROM DESCRIPTION The MX23L25640 is a 256 Mbit NAND interface programmable mask read-only memory that operates with a single power supply. The memory organization consists of 512 + 16 (Redundancy bytes x 32 pages x |
Original |
MX23L25640 256M-BIT MX23L25640 48-pin 44-pin 576Note 16Note) 512Note) | |
MX23L256Contextual Info: MX23L25610 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (TSOP ONLY) FEATURES • Current - Operating: 30mA (max.) @ 5MHz - Standby: 15uA (max.) • Supply voltage - 3.0V ~ 3.6V • Package - 56 pin TSOP • Temperature - 0~70°C • Bit organization |
Original |
MX23L25610 256M-BIT 100ns FEB/04/2002 NOV/22/2002 APR/03/2003 APR/24/2003 MAY/08/2003 JUN/06/2003 PM0873 MX23L256 | |
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Contextual Info: PRELIMINARY MX23L25610 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (TSOP ONLY) FEATURES • Current - Operating: 30mA (max.) @ 5MHz - Standby: 15uA (max.) • Supply voltage - 3.0V ~ 3.6V • Package - 56 pin TSOP • Temperature - 0~70°C • Bit organization |
Original |
MX23L25610 256M-BIT 100ns D126V FEB/04/2002 NOV/22/2002 PM0873 | |
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Contextual Info: MX23L25610 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (TSOP ONLY) FEATURES • Current - Operating: 30mA (max.) @ 5MHz - Standby: 15uA (max.) • Supply voltage - 3.0V ~ 3.6V • Package - 56 pin TSOP • Temperature - 0~70°C • Bit organization |
Original |
MX23L25610 256M-BIT 100ns FEB/04/2002 NOV/22/2002 APR/03/2003 PM0873 | |
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Contextual Info: MX23L25610 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (TSOP ONLY) FEATURES • Current - Operating: 30mA (max.) @ 5MHz - Standby: 15uA (max.) • Supply voltage - 3.0V ~ 3.6V • Package - 56 pin TSOP • Temperature - 0~70°C • Bit organization |
Original |
MX23L25610 256M-BIT 100ns FEB/04/2002 NOV/22/2002 APR/03/2003 APR/24/2003 PM0873 | |
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Contextual Info: MX23L25611 256M-BIT 16M x 16 / 32M x 8 MASK ROM WITH PAGE MODE (SSOP ONLY) FEATURES • Bit organization - 32M x 8 (byte mode) - 16M x 16 (word mode) • Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) • Page Size - 8 words per page |
Original |
MX23L25611 100ns 256M-BIT SEP/06/2001 SEP/07/2001 FEB/01/2002 PM0822 | |
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Contextual Info: MX23L25612 SEQUENTIAL 256M-BIT MASK ROM FEATURES • Bit organization - 16M x 16 word mode only - 256 words/page - Total 64K pages • Sequential access at 200ns cycle time in a page • Asynchronous chip enable input (ALEH, ALEL) • Access time - Read latency time: 1000ns |
Original |
MX23L25612 256M-BIT 200ns 1000ns 150ns MX23L25612TC-20 JUL/23/1999 AUG/17/2001 | |
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MX23L25612
Abstract: MX23L256 Tales TSOP 86 Package AD12 AD14
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Original |
MX23L25612 256M-BIT 200ns 1000ns 200ns 150ns MX23L25612TC-20 MX23L25612YC-20 MX23L25612 MX23L256 Tales TSOP 86 Package AD12 AD14 | |
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Contextual Info: MX23L25612 SEQUENTIAL 256M-BIT MASK ROM FEATURES • Bit organization - 16M x 16 word mode only - 256 words/page - Total 64K pages • Sequential access at 200ns cycle time in a page • Asynchronous chip enable input (ALEH, ALEL) • Access time - Read latency time: 1000ns |
Original |
MX23L25612 256M-BIT 200ns 1000ns 200ns 150ns MX23L25612TC-20 MX23L25612YC-20 | |
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Contextual Info: MX23L25612 SEQUENTIAL 256M-BIT MASK ROM FEATURES • Bit organization - 16M x 16 word mode only - 256 words/page - Total 64K pages • Sequential access at 200ns cycle time in a page • Asynchronous chip enable input (ALEH, ALEL) • Access time - Read latency time: 1000ns |
Original |
MX23L25612 256M-BIT 200ns 1000ns 150ns MX23L25612TC-20 MX23L25612YC-20 | |
MSP55lv512
Abstract: MSP55LV100S MSP55LV128 34A65 fujitsu msp55lv512 MSP55LV100G MSP55LV128M MSP55LV160 MSP55LV100 MSP55LV160A
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AF9723/23B TEF808-50CF-01 FF804 50CARD AF9845/45B/45C FAT12FAT16 1GBit128MByte Am27C400 Am29DL16xCB TE003-48BG-07D MSP55lv512 MSP55LV100S MSP55LV128 34A65 fujitsu msp55lv512 MSP55LV100G MSP55LV128M MSP55LV160 MSP55LV100 MSP55LV160A | |
MSP14LV160
Abstract: MSP54LV100 MCF10P-128MS 70f3350GC 63a52 95f264k HY27US08121B MSP55LV128 MSP55lv512 fujitsu msp55lv512
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Original |
AF9708/09/09B/10/23 nearest09 AF9709B/09C AF9723 AF9708 TE004-44PL-04 AF9709 MSP14LV160 MSP54LV100 MCF10P-128MS 70f3350GC 63a52 95f264k HY27US08121B MSP55LV128 MSP55lv512 fujitsu msp55lv512 | |