MXD1013 Search Results

4572 IC 8PIN

Contextual Info: 19-0394; R ev 0 ; 12/97 J V \ J Y X A J V \ 3-i n-1 S i l i c o n D e l a y L i n e The MXD1013 is available in m ultiple versions, each offering a different com bination of delay times. It comes in the space-saving 8-pin ^M AX package, as well as a standard 8-pin SO and DIP. It is also offered in industry -s ta n d a rd 16-pin SO and 14-pin DIP p a c k a g in g ,

max038

Contextual Info: Waveform G enerator MAX038 High-Frequency Waveform D elay Lines MXD1000 MXD1013 5-Tap Silicon Delay Line. 10-19*

Contextual Info: a d ^ All information in this data sheet is preliminary and subject to change. b4E P • S fi7 b b 5 1 AM AM Æ W D D D flS 4 " i| lÆ â 252 ■ AM AM i J f A nxn Æ w X Three-ii i-One Silicon D elay Line Maxim can customize standard delays to meet special

marking code E5 SMD ic sot23-5

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Contextual Info: We hope that you will find this CD-ROM a helpful tool for selecting the best Maxim IC for your design. To the left, please find a menu of the documents contained on this CD-ROM. Click on each item for a more detailed list. All of the indexes, tables, and trees on this CD-ROM contain links to product data sheets. After you have viewed a

toshiba laptop schematic diagram

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Contextual Info: Welcome to the Maxim Full-Line Data Catalog. We hope you find this CD-ROM a helpful tool for selecting the best Maxim IC for your design. This CD-ROM contains: The Maxim Full-Line Data Catalog The menu to the left of this page lists the available documents. Use the small

Contextual Info: ADVANCE INFORMATION All inform ation in this data sheet is prelim inary and su b je ct to change. 8/93 Three-in-One Silicon D elay Line _Features ♦ Delay Tolerances ±2ns 4 Stability and Precision Over Temperature and Supply Voltage ♦ Leading and Trailing Edge Accuracy

Contextual Info: ADVANCE INFORMATION y ifly jx iy v i All information in this data sheet is preliminary and subject to change. 8/93 Three-in-One Silicon D elay Line Features ♦ Delay Tolerances +2ns ♦ Stability and Precision Over Temperature and Supply Voltage ♦ Leading and Trailing Edge Accuracy

Contextual Info: 19-0394; Rev 0; 12/97 3-in-1 Silicon Delay Line _Applications Clock Synchronization Digital Systems _Pin Configurations TOP VIEW IN1 1 8 VCC IN2 2 7 OUT1 3 6 OUT2 GND 4 5 OUT3 _Features ♦ Improved Second Source to DS1013

Contextual Info: 19-0394; Rev 0; 12/97 3-in-1 Silicon Delay Line _Applications Clock Synchronization Digital Systems _Pin Configurations TOP VIEW IN1 1 8 VCC IN2 2 7 OUT1 3 6 OUT2 GND 4 5 OUT3 _Features ♦ Improved Second Source to DS1013

Contextual Info: 19-0394; Rev 0; 12/97 3-in-1 Silicon Delay Line _Applications Clock Synchronization Digital Systems _Pin Configurations TOP VIEW IN1 1 8 VCC IN2 2 7 OUT1 3 6 OUT2 GND 4 5 OUT3 _Features ♦ Improved Second Source to DS1013