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    NT5CB256

    Abstract: NT5CC256M16CP-DI NT5CB256M16 NT5CB256m NT5CB512M8CN-DI NT5CB256M16CP-DI NT5CC512M8CN-DI NT5CC512M8CN-DII NT5CB256M16CP-EK NT5CC512M8
    Text: 4Gb DDR3 SDRAM C-Die NT5CB512M8CN / NT5CB256M16CP NT5CC512M8CN / NT5CC256M16CP CAS Latency Frequency -DI/DII* -EK* -FL* DDR3/L-1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 Min. Min. Speed Bins Units tCK Parameter Max. Max. Min. Max. Avg Clock Frequency 300 800


    Original     		PDF NT5CB512M8CN NT5CB256M16CP NT5CC512M8CN NT5CC256M16CP DDR3/L-1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 NT5CB256 NT5CC256M16CP-DI NT5CB256M16 NT5CB256m NT5CB512M8CN-DI NT5CB256M16CP-DI NT5CC512M8CN-DI NT5CC512M8CN-DII NT5CB256M16CP-EK NT5CC512M8

    Untitled

    Abstract: No abstract text available
    Text: 4Gb DDR3 SDRAM C-Die NT5CB512M8CN / NT5CB256M16CP NT5CC512M8CN / NT5CC256M16CP Feature   Output Driver Impedance Control  Differential bidirectional data strobe  Internal self calibration:Internal self calibration Backward compatible to VDD= VDDQ= 1.5V


    Original     		PDF NT5CB512M8CN NT5CB256M16CP NT5CC512M8CN NT5CC256M16CP

    NT5CB256M16

    Abstract: NT5CC256M16CP-DI NT5CB256M16CP NT5CB256M16CP-DI NT5CC512M8 NT5CB512M8CN-CG NT5CC256M16 wrs4 NT5CB512M8CN NT5CB256
    Text: 4Gb DDR3 SDRAM C-Die NT5CB1024M4CN / NT5CB512M8CN / NT5CB256M16CP NT5CC1024M4CN / NT5CC512M8CN / NT5CC256M16CP Feature  VDD = VDDQ = 1.5V ± 0.075V JEDEC Standard  8n-bit prefetch architecture Power Supply  Output Driver Impedance Control VDD = VDDQ = 1.35V -0.0675V/+0.1V


    Original     		PDF NT5CB1024M4CN NT5CB512M8CN NT5CB256M16CP NT5CC1024M4CN NT5CC512M8CN NT5CC256M16CP NT5CB256M16 NT5CC256M16CP-DI NT5CB256M16CP-DI NT5CC512M8 NT5CB512M8CN-CG NT5CC256M16 wrs4 NT5CB256

    NT5CB256M16CP

    Abstract: NT5CC256M16CP NT5CC256M16CP-DI NT5CC512M8CN DDR3-2133-CL14 NT5CB512M8CN NT5CC512M8CN-DII NT5CB512M8CN-CG NT5CB256M16 NT5CC256M16CP-DII
    Text: 4Gb DDR3 SDRAM C-Die NT5CB512M8CN / NT5CB256M16CP NT5CC512M8CN / NT5CC256M16CP CAS Latency Frequency -BE* -CG* -DI/DII* -EK* -FL* DDR3/L-1066-CL7 DDR3/L-1333-CL9 DDR3/L-1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 Speed Bins Units tCK Parameter Min. Max. Min. Max.


    Original     		PDF NT5CB512M8CN NT5CB256M16CP NT5CC512M8CN NT5CC256M16CP DDR3/L-1066-CL7 DDR3/L-1333-CL9 DDR3/L-1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 NT5CC256M16CP NT5CC256M16CP-DI NT5CC512M8CN-DII NT5CB512M8CN-CG NT5CB256M16 NT5CC256M16CP-DII

    NT5CB256M16

    Abstract: NT5CC256M16 NT5CC256
    Text: 4Gb DDR3 SDRAM C-Die NT5CB512M8CN / NT5CB256M16CP NT5CC512M8CN / NT5CC256M16CP CAS Latency Frequency -DI/DII* -EK* -FL* DDR3/L-1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 Min. Min. Speed Bins Units tCK Parameter Max. Max. Min. Max. Avg Clock Frequency 300 800


    Original     		PDF NT5CB512M8CN NT5CB256M16CP NT5CC512M8CN NT5CC256M16CP DDR3/L-1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 NT5CB256M16 NT5CC256M16 NT5CC256

    NT5CB256M16CP-DII

    Abstract: NT5CC256M16CP-DI NT5CB256M16CP-FL NT5CB512M8CN-DII NT5CB512M8CN-FL NT5CB256M16CP NT5CB512M8CN-EK NT5CB256M16CP-DI NT5CC256M16 NT5CC256M16CP-DII
    Text: 4Gb DDR3 SDRAM C-Die NT5CB512M8CN / NT5CB256M16CP NT5CC512M8CN / NT5CC256M16CP Feature   Output Driver Impedance Control  Differential bidirectional data strobe  Internal self calibration:Internal self calibration Backward compatible to VDD= VDDQ= 1.5V


    Original     		PDF NT5CB512M8CN NT5CB256M16CP NT5CC512M8CN NT5CC256M16CP NT5CB256M16CP-DII NT5CC256M16CP-DI NT5CB256M16CP-FL NT5CB512M8CN-DII NT5CB512M8CN-FL NT5CB512M8CN-EK NT5CB256M16CP-DI NT5CC256M16 NT5CC256M16CP-DII

    Untitled

    Abstract: No abstract text available
    Text: 4Gb DDR3 SDRAM C-Die NT5CB512M8CN / NT5CB256M16CP NT5CC512M8CN / NT5CC256M16CP Feature   Output Driver Impedance Control  Differential bidirectional data strobe  Internal self calibration:Internal self calibration Backward compatible to VDD= VDDQ= 1.5V


    Original     		PDF NT5CB512M8CN NT5CB256M16CP NT5CC512M8CN NT5CC256M16CP

    Untitled

    Abstract: No abstract text available
    Text: Nanya Technology Corp. DDR3 L 4Gb SDRAM NT5CB(C)512M8CN / NT5CB(C)256M16CP NT5CB(C)512M8CN / NT5CB(C)256M16CP Commercial, Industrial and Automotive DDR3(L) 4Gb SDRAM Features  Signal Integrity  JEDEC DDR3 Compliant - Configurable DS for system compatibility


    Original     		PDF 512M8CN 256M16CP DDR3L-1866

    NT5CC256

    Abstract: NT5CB256M16 512M8CN NT5CC256M16
    Text: Nanya Technology Corp. DDR3 L 4Gb SDRAM NT5CB(C)512M8CN / NT5CB(C)256M16CP NT5CB(C)512M8CN / NT5CB(C)256M16CP Commercial, Industrial and Automotive DDR3(L) 4Gb SDRAM Features  Signal Integrity  JEDEC DDR3 Compliant - Configurable DS for system compatibility


    Original     		PDF 512M8CN 256M16CP DDR3L-1866 NT5CC256 NT5CB256M16 NT5CC256M16

    Untitled

    Abstract: No abstract text available
    Text: Nanya Technology Corp. DDR3 L 4Gb SDRAM NT5CB(C)512M8CN / NT5CB(C)256M16CP NT5CB(C)512M8CN / NT5CB(C)256M16CP Commercial, Industrial and Automotive DDR3(L) 4Gb SDRAM Features  Signal Integrity  JEDEC DDR3 Compliant - Configurable DS for system compatibility


    Original     		PDF 512M8CN 256M16CP

    Untitled

    Abstract: No abstract text available
    Text: 4Gb DDR3 SDRAM C-Die NT5CB C 512M8CN / NT5CB(C)256M16CP Options Features  Differential clock input (CK, ) Speeds  Differential bidirectional data strobe  DDR3 - 2133 2,3  TDQS and /TDQS pair for X8  DDR3 - 1866 2,3  8n-bit prefetch architecture


    Original     		PDF 512M8CN 256M16CP P124-136 P92-123 P146-156 P137-143

    Untitled

    Abstract: No abstract text available
    Text: Nanya Technology Corp. DDR3 L 4Gb SDRAM NT5CB(C)512M8CN / NT5CB(C)256M16CP NT5CB(C)512M8CN / NT5CB(C)256M16CP Commercial, Industrial and Automotive DDR3(L) 4Gb SDRAM Features  Signal Integrity  JEDEC DDR3 Compliant - Configurable DS for system compatibility


    Original     		PDF 512M8CN 256M16CP

    NT5CB256M16

    Abstract: NT5CC256 NT5CC256M16 NT5CC512M8 NT5CC
    Text: 4Gb DDR3 SDRAM C-Die NT5CB C 512M8CN / NT5CB(C)256M16CP Options Features  Differential clock input (CK, ) Speeds  Differential bidirectional data strobe  DDR3 - 2133 1,2  TDQS and /TDQS pair for X8  DDR3 - 1866 1,2  8n-bit prefetch architecture


    Original     		PDF 512M8CN 256M16CP P125-138 P93-124 P148-158 P139-145 NT5CB256M16 NT5CC256 NT5CC256M16 NT5CC512M8 NT5CC