NT5DS8 Search Results

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

Nanya nt5ds8m16fs

Abstract: NT5DS8M16FS NT5DS8M16FT-5TI NT5DS8M16FS-5T DDR333 DDR400 NT5DS8M16 NT5DS8M16FT-6KI NT5DS8M16FT
Contextual Info: NT5DS8M16FT-5TI NT5DS8M16FS-5TI NT5DS8M16FT-6KI NT5DS8M16FS-6KI 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8M16 NT5DS8M16FS
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

NT5DS8M16FS-5T

Abstract: NT5DS8
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • • • • • CAS Latency and Frequency CAS Latency 2 2.5 3 Maximum Operation Frequency MHz DDR400 DDR333 DDR266 (5T) (6K) (75B) 133 100 166 166 133 200 - • • • • • • • • • • Double data rate architecture: two data transfers per

Contextual Info: NT5DS8M16FT-5TI NT5DS8M16FT-6KI 128Mb DDR SDRAM - Preliminary Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8

Contextual Info: DDR 128Mb SDRAM Nanya Technology Corp. Preliminary Not finalized. NT5DS8M16IS NT5DS8M16IS Commercial and Industrial Consumer DDR 128Mb SDRAM Features  Data Integrity with Power Savings  JEDEC DDR Compliant - Differential clock inputs CK and 

NT5DS8M16HS

Contextual Info: NT5DS8M16HS 128Mb DDR SDRAM Feature z 2KB page size for all configurations. CAS Latency Frequency z DQS is edge-aligned with data for reads and is DDR-333 DDR400 -6K/-6KI -5T/-5TI 2.5-3-3 3-3-3 CL2 266 266 CL2.5 333 333 CL3 333 400 Speed Sorts CL-tRCD-tRP

NT5DS8M16FS-5TI

Contextual Info: NT5DS8M16FT-5TI NT5DS8M16FS-5TI NT5DS8M16FT-6KI NT5DS8M16FS-6KI 128Mb DDR SDRAM - Preliminary Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8M16FT-5T NT5DS8M16FS5T NT5DS8M16 NT5DS8 DDR333 DDR400 NT5DS8M16FS
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

NT5DS8M16FS-5T

Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • • • • • CAS Latency and Frequency CAS Latency 2 2.5 3 Maximum Operating Frequency MHz DDR466 DDR400 DDR333 DDR266 (43) (5T) (6K) (75B) 133 100 166 166 133 233 200 - • • • • • • •

NT5DS8M16FS-5T

Abstract: NT5DS8M16FT-5T NT5DS8M16FS-6K
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM - Preliminary Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

Contextual Info: Nanya Technology Corp. DDR 128Mb SDRAM NT5DS8M16IS NT5DS8M16IS Commercial and Industrial Consumer DDR 128Mb SDRAM Features  Data Integrity with Power Savings  JEDEC DDR Compliant - Differential clock inputs CK and  - Auto Refresh Mode - Self Refresh Mode

Contextual Info: DDR 128Mb SDRAM NT5DS8M16IS Commercial and Industrial Consumer DDR 128Mb SDRAM Features  Data Integrity with Power Savings  JEDEC DDR Compliant - Differential clock inputs CK and  - Auto Refresh Mode - Self Refresh Mode - DLL aligns DQ and DQS transition with CK transitions

um61256

Abstract: hynix hy57v281620 hy57v641620 cross reference WINBOND Serial flash cross reference UM611024 256k x8 SRAM 28F160S3 Samsung EOL "DDR1 SDRAM" 1MX8/512KX16
Contextual Info: Cross Reference Your Memory Provider Part number µPD4218165 µPD4218165 µPD424260 µPD431000A µPD43256B µPD441000L-B µPD442000L-B µPD442012L-XB µPD444012L-B µPD4504161 28F160S3/B3/C3 A29F002 AM29DL162C/D AM29DL163C/D AM29DL164C/D AM29F002B AM29F010