ORD 1114 Search Results

Contextual Info: DATA SHEET NEC / M O S INTEGRATED CIRCUIT / MC-42S4000LAB32S SERIES 4 M-W ORD BY 32-BIT DYNAMIC RAM MODULE SO DIM M FAST PAGE MODE Description The M C -4 2S400 0LA B 32 S series is a 4,194,304 w ords by 32 bits dynam ic R A M m odule (Small Outline D IM M )

Contextual Info: O K I Semiconductor MSC23232B/BL-xxBS16/DS16 2,097,152-Word by 32-Bit DRAM Module: Fast Page Mode DESCRIPTION The OKI M SC23232B/BL-xxBS16/D S16 is a fully decoded 2,097,152-w ord x 32-bit CMOS Dynamic Ran­ dom Access M emory Module composed of sixteen 4-Mb DRAMs in SOJ M SM 514400B/BL packages

HN62408

Abstract: HN62408FP HN62408P a51s Hitachi Scans-001 D1422 524,288-word x 16-bit
Contextual Info: HN62408 Series — Preliminary 524288-Word x 16-Bit/1048576-Word x 8-Bit CMOS Mask Programmable ROM H N 6 2 4 0 8 Series is a 8-M bit C M O S m ask-program able R O M organized either as 524288-w ord x 16-Bit or as 10 4857 6-W od x 8Bit. It can be operated with a battery because of low power

Contextual Info: HN62408 Series — Preliminary 524288-Word x 16-Bit/1048576-Word x 8-Bit CMOS Mask Programmable ROM H N 6 2 4 0 8 Series is a 8-M bit C M O S m ask-program able R O M organized either as 524288-w ord x 16-Bit or as 10 4857 6-W od x 8Bit. It can be operated with a battery because of low power

Contextual Info: HN62408 Series — Preliminary 524288-Word x 16-Bit/1048576-Word x 8-Bit CMOS Mask Programmable ROM H N 6 2 4 0 8 Series is a 8-M bit C M O S m ask-program able R O M organized either as 524288-w ord x 16-Bit or as 10 4857 6-W od x 8Bit. It can be operated with a battery because of low power

Contextual Info: niTsuBisHKnicnpTR/niPRC biE d • b 2 iHa 2 a 0 0 1 7 7 0 3 101 « m m M IT S U B IS H I L S I« M 5 0 5 3 2 -X X X F P D O T M A T R IX L IQ U ID C R Y S T A L D IS P L A Y C O N T R O L L E R - D R IV E R DESCRIPTION a total of 256 w ord s, with 9 bits to a word, and

relay 5v 5a, 5 pin

Abstract: relay 5v 5 pin
Contextual Info: • iso2-cmos M T8960/61 /6 2 /6 3 /6 4 /6 5 /6 6 /6 7 Integrated PCM Filter/Codec 9161-002-020-N A • • • • • • • • • • • • • Novem ber 1990 ISSUE 8 Features Pin Connections ST-BUS compatible. Transmit/Receive filters & PCM Codec in one I.C.

315c dm hen vd

Contextual Info: W haì H E W LE T T mLnM P a c k a r d E igh t C haracter 5.0 mm 0.2 in ch H erm etic Sm art 5 X 7 A lphanum eric D isplays For M ilitary A pplications Technical Data Features • Wide O perating T em pera­ tu re R ange -55°C to +85°C • True H erm etic P ack age for

FJ 3528

Abstract: FJ 3528 clock SM 4108 marking code d04 CDB4216 27L21 CS4216-KL 16T MARKING CS42L6 CHIP SM 4108
Contextual Info: CS4216 Semiconductor Corporation 16-Bit Stereo Audio Codec Features General Description • CMOS Stereo Audio Input/Output System Delta-Sigma A/D Converters Delta-Sigma D/A Converters Input Anti-Aliasing and Output Smoothing Filters Programmable Input Gain and

Contextual Info: 2580-N.I DESCRIPTION PIN CONFIGURATION CODING FORMAT C o d in g data fo r the 2580 m ay be sen t to S ig n e tic s via p u n ch e d c a rd s o r via a w ritten truth table. C a rd s are preferred s in c e erro rs are e ss e n tia lly elim inated . O n rece ip t of a card d eck, S ig n e tic s w ill tra nslate the ca rd d e c k to a truth ta b le usin g the

Contextual Info: PRELIMINARY 256K W IDE DRAM 16 DRAM X FAST-PAGE-MODE SELF REFRESH FEATURES PIN A SSIG N M EN T Top View • SELF REFRESH, or "Sleep M ode" • Industry-standard x l6 pinouts, tim ing, functions and packages • H igh-perform ance CMOS silicon-gate process

557 timer connections

Abstract: M68000 MC68340 MC68681
Contextual Info: 11/2/95 SECTION 1: OVERVIEW UM Rev 1 TABLE OF CONTENTS Paragraph Number Page Number Title Section 1 Device Overview 1.1 1.1.1 1.1.2 1.2 1.2.1 1.2.2 1.3 1.3.1 1.3.1.1 1.3.1.2 1.3.1.3 1.3.1.4 1.3.1.5 1.3.1.6 1.3.1.7 1.3.2 1.3.3 1.3.4 1.4 1.5 1.6 1.7 M68300 Family. 1-2

Contextual Info: PRELIMINARY ICRON M T 4C 16256/7/8/9 S 256K X 16 W IDE DRAM 256K X 16 DRAM WIDE DRAM FEATURES PIN ASSIGNMENT Top View • SELF REFRESH, or "Sleep M ode" • Industry-standard x l6 pinouts, timing, functions and packages • High-perform ance CM OS silicon-gate process

230843

Abstract: intel intellec prompt 48 210997 80960 Programmer Reference manual 210918 mohawk 80960MC A-20
Contextual Info: 80960MC Programmer’s Reference Manual 1988 Order Number: 271081-001 inter LITERATURE To order Intel literature write or call: Intel Literature Sales Toll Free Number: P.O. Box 58130 800 548-4725* Santa Clara, CA 95052-8130 Use the order blank on the facing page or call our Toll Free Number listed above to order literature.

HA 1105 R seven segment

Abstract: AIsAB
Contextual Info: Final 80286 Advanced Micro Devices High-Performance Microprocessor with Memory Management and Protection DISTINCTIVE CHARACTERISTICS • High-performance processor up to 13.3 times IAPX 86 when using the 16 MHz 80286 ■ Large address space -1 6 megabytes physical

58A7

Abstract: d15dd MC6843
Contextual Info: MOTOROLA •■ SEMICONDUCTOR TECHNICAL DATA MC68HC001 Technical Sum m ary Low Power HCMOS 8-/16-/32-Bit Microprocessor This docum ent contains both a sum m ary of the MC68HC001 and a detailed set o f param etric specifications. For com plete inform ation refer to the M68000 UM/

9914E

Contextual Info: SAMSUNG SEMICONDUCTOR INC 14E D | 00G7äfc.a T . s> KS82C50A 1 | - 7 5 - 3 7 '0 5 CMOS ASYNCHRONOUS COMMUNICATION ELEMENT ACE Preliminary FEATURES/BENEFITS DESCRIPTION Single Chip UAR17BRG DC to 10MHz Operation, (DC to 625K Baud) Crystal or External Clock Input

8086 interrupt structure

Abstract: 8080a 8086 microcomputer LR2 D 80286 address decoder 80286 microprocessor pin out diagram 8086 interrupt vector table 8086 interrupts application 8086 logic diagram 8086 timing diagram
Contextual Info: 82C59A 82C 59A CMOS Programmable Interrupt Controller ¡APX86 Family DISTINCTIVE CHARACTERISTICS • • • • • • • Pin C om patible with NMOS 8259A Expandable to 64 Levels Eight Level Priority Controller Individual Request Mask Capability Programmable Interrupt Modes

Contextual Info: HICR0N TECHNOLOGY INC bOE D • b l l l S H 1! GGObbOl 43b ■ urn PRELIMINARY 256K x 16 DRAM WIDE DRAM FAST-PAGE-MODE SELF REFRESH FEATURES PIN ASSIGNMENT Top View • SELF REFRESH, or "Sleep M ode" • Industry-standard x l6 p inouts, tim ing, functions

M6800 programming manual

Abstract: MC6854 mc6850 MC68HCOOO mc6821 M6800 M68000 MC68000 MC68008 MC68020
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC68HC000 Technical Sum m ary Low Power HCMOS 16-/32-Bit Microprocessor This docum ent contains both a sum m ary o f the MC68HC000 and a detailed set o f parametrics. For detailed in form ation on the MC68HC000, refer to the M68000

mbl 8289

Abstract: it 715
Contextual Info: FUJITSU NMOS HIGH-INTEGRATION 16-BIT MICROPROCESSOR MBL 80186 MBL 80186-6 February 1986 Edition 1.0 NMOS H IG H -IN T E G R A T IO N 16-BIT MICROPROCESSOR The Fujitsu M B L 8 0 1 8 6 is a highly integrated 16-bit microprocessor. The M B L 8 0 1 8 6 effectively combines 15—2 0

MSTAR 901

Abstract: MSTAR 828 dic a700 stk 795 821 GE 8352 MSTAR 309 108 046f 864F 5252 F 0921 XD 5252 F
Contextual Info: fig-FORTH FOR PACE ASSEMBLY SOURCE LISTIN G RELEASE 1 WITH COMPILER SECURITY AND VARIABLE LENGTH NAMES MAY 1979 This public domain publication is provided through the courtesy of the Forth Interest Group, P .O . Box 1105, San Carlos, CA 94070. Further distribution must include this notice.

Contextual Info: S D - 19069-003 IO M A T E R I A L NO. LOOSE PIE CE M A T E R I A L NO. T A P E MOUNTED ENG. NO. ENG. NO. STUD SIZE ±.003 "S" "W" MAX. 190690352 M- 1113-02 190690353 M- 1113-02T 2 .094 190690354 M- 1113-04 190690355 M- 1113-04T 4 .119 3.02 190690356 M- 1113-06

difference between intel 8086 and intel 80186 pro

Abstract: D1985 80186 architecture intel 8289 basic operating mode intel 80186 memory map intel 8289 PIN DIAGRAM OF 80186 seven segment ulf MBL80186 80186
Contextual Info: FUJITSU MBL 80186 MBL 80186-6 NMOS HIGH-INTEGRATION 16-BIT MICROPROCESSOR February 1986 Edition 1.0 NMOS H IG H -IN T E G R A T IO N 16-BIT MICROPROCESSOR The Fujitsu M B L 8 0 1 8 6 is a highly integrated 16-bit microprocessor. The M B L 8 0 1 8 6 effectively combines 15—2 0