PASB Search Results

JCBP-43

Abstract: l 9143 BG291 R04350B
Contextual Info: Surface Mount Bandpass Filter 50Ω 26 to 60 MHz Features Maximum Ratings o Operating Temperature Storage Temperature RF Power Input o -40 C to 85 C -55oC to 100oC 0.5W INPUT OUTPUT GROUND • • • • Low I.Loss, 0.3 Typ @ Passband Good VSWR, 1.2:1 Typ @ Pasband

TB-442

Contextual Info: Surface Mount Bandpass Filter 50Ω 26 to 60 MHz Features Maximum Ratings o Operating Temperature Storage Temperature RF Power Input o -40 C to 85 C -55oC to 100oC 0.5W INPUT OUTPUT GROUND • • • • Low I.Loss, 0.3 Typ @ Passband Good VSWR, 1.2:1 Typ @ Pasband

6F3P

Abstract: 603n rgt4 G21-70
Contextual Info: 603n TpHOÄ-neHTOÄ Triode-pentode TpHOÄ-neHTOÄ 60311 npeAHa3HaqeH äjih pa- 6 o t w b ycH JiH T ejiflx HH3K0H qacTO Tbi h b K acK a ,n a x KaApOBOH paSB epT K H TeJieBH3H0HHbIX npHeMHHKOB c yrjiO M OTKjTOHeHHH J iy ^ a K H H ecK ona 70— 110°. TpHOA-neHTO^ 60311 B b in y cK a e T c a b MHHHaTK>pHOM o j opMJieHHH, b CTeKjiHHHOM öajuioHe c ÄeBHTHlIITblpbKOBOH H02KK0H, C }KeCTKHMH BblBO^aMH,

30021

Abstract: L48C L41C IC L44C DATASHEET L30C l31c L43C ORSO42G5 ORSO82G5 ORT42G5
Contextual Info: ORCA ORSO42G5 and ORSO82G5 0.6 - 2.7 Gbps SONET Backplane Interface FPSCs August 2005 Data Sheet Introduction Lattice has extended its family of high-speed serial backplane devices with the ORSO42G5 and ORSO82G5 devices. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSO42G5 and

2T931A

Abstract: KT853 2T926A KT838A 2T803A 2T809A 2T904A 2T808A 2T603 2T921A
Contextual Info: g V ì^ fg : W SflÉptÉ! W ^ i$ î0 i0 û * W I I m ^7ù£-à.S& m p ,-À-& s i: r& mSÊmÈÈ •ï ' ^ f§ W % a s Ü lg S I W M 7 \ w Jkw s i 4; h# » ik « W 'ï illl ¡ P * te ili -X\ S I Iw 11 4-S U E S T am Ir ¿ « 1 1 1 » , ü i a Î3 & & C nPA BO H H M K

Contextual Info: Automotive & Industrial Grade 32.768kHz SMD Low Profile Crystal ABS07AIG Pb RoHS/RoHS II Compliant 3.2 x 1.5 x 0.8 mm Moisture Sensitivity Level MSL – This product is Hermetically Sealed and not Moisture Sensitive - MSL = N/A: Not Applicable FEATURES:

PAS-BC3WK

Abstract: Chip crystal oscillator safety factor
Contextual Info: PIERCE ANALYZER SYSTEM PAS ADVANCED BOARD CHARACTERIZATION SERVICE PAS-BC3WK INTRODUCTION: The majority of electronic designs have some form of timing associated with them. Depending on the frequency accuracy requirements, some employ oscillators while others use off-the-shelf crystals in conjunction with the built-in oscillator circuit;

Contextual Info: Automotive&Industrial Grade Ultra Miniature Ceramic Base SMD Crystal ABM11AIG Pb RoHS / RoHS II Compliant 2.0 x 1.6 x 0.5mm Moisture Sensitivity Level MSL – This product is Hermetically Sealed and not Moisture Sensitive - MSL = N/A: Not Applicable FEATURES:

TB 1226 BN

Abstract: 531 T70 n03 0AS001 B05AD 2U 34
Contextual Info: in y Intel 450NX PCIset 82454NX PCI Expander Bridge PXB 82453NX Data Path Multiplexor (MUX) 82452NX RAS/CAS Generator (RCG) 82451 NX Memory & I/O Controller (MIOC) Revision 1.3 March 1999 Intel Corporation 1998,1999 Information in this document is provided in connection with Intel products. No license, express or

dllp

Abstract: pci express dllp pci express serial parallel port circuit diagram PCI express switch pci express tlp ORT42G5 ORT82G5
Contextual Info: ispLever CORE TM PCI Express IP Core User’s Guide March 2004 ipug25_02 Lattice Semiconductor PCI Express IP Core Introduction PCI Express is a high performance, general purpose Serial I/O Interconnect defined for a wide variety of future computing and communication platforms. The basic premise of PCI Express is that the host PCI software remains

AD30102

Abstract: E3P15
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs March 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

ORCA ORT42G5

Contextual Info: ORCA ORT42G5 and ORT82G5 3.7 Gbits/s XAUI and 4.25 Gbits/s FC FPSCs November 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

L67c

Abstract: L41C l44c L71C l75c transistor l57c IC L44C DATASHEET l31c L47c l51c
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs February 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

l37c 8 pin

Abstract: L41C G40TL l34c L43C L74c L18T l14c L25C ENCODER l31c
Contextual Info: ORCA ORT42G5 and ORT82G5 0.6 to 3.7 Gbps XAUI and FC FPSCs July 2008 Data Sheet DS1027 Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

TL 2272 DECODER

Abstract: 10G BERT TL 2262 L36CA 30132 verilog code 16 bit LFSR in PRBS 10gbps serdes 30014 ap13.6 diode 680-pin
Contextual Info: Data Sheet April, 2002 ORCA ORT82G5 1.0—1.25/2.0—2.5/3.125—3.5 Gbits/s 8b/10b SERDES Backplane Interface FPSC Introduction Lattice has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded system-on-chips SoC architecture, the

C2021M

Abstract: B1568 mosfet ftr 03 2SC1B15 2SA1904 Mosfet FTR 03-E 2SC2021E 2SC1740 transistor 2SK2295 2S0240
Contextual Info: Transistor Quick reference Package-A ^plication Application v CEO V •V ces *VcEH Low rbb' Head Amp Low Noise Package FTR FTL ATR ATV SPT / 2SB737 V 2SD786 40 TO-92L 40 2SC2021LJNE) 2SB821 50 / 2SA937ALN \2SC2021LN(RS) 2SB1276 ( 2SA933A 2SA937AM \2SC1740(QR&)

AB29 DIODE

Contextual Info: Electrical Characteristics 12.1 Signal Specifications 12.1.1 Unused Pins 12 For reliable operation, always connect unused inputs to an appropriate signal level. Unused AGTL+ inputs should be connected to VTT. Unused active low 3.3V-tolerant inputs should be

2N3906 A30

Abstract: relay5v ak25p 24c166 debounce IC M33 fuse B27 fuse n20 fuse PT25D C42 GORE
Contextual Info: ORSO/ORT82G5 1 Rev. 1/7/03 Lattice Semiconductor Corp. JP4 Schematic page 3 A 7-pin serial connector used for configuration. Serial Connector Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 GND NC PROGRMN DONE D0 CCLK VDD JP6 Schematic page 3 JP6 is an 8-pin JTAG connector. It is physically similar to JP4; an arrow indicates pin 1.

Contextual Info: Automotive Grade Ceramic SMD Ultra Miniature Crystal ABM8GAIG Pb in glass RoHS / RoHS II Compliant exempt 7(c - I per RoHS II 2011/65/EU Annex) 3.2 x 2.5 x 0.8mm Moisture Sensitivity Level (MSL) – This product is Hermetically Sealed and not Moisture Sensitive - MSL = N/A: Not Applicable

Contextual Info: Automotive & Industrial Grade Ceramic SMD Miniature Crystal ABM3CAIG RoHS Pb in glass exempt 7(c - I per RoHS II 2011/65/EU Annex) Compliant 5.0 X 3.2 X 1.3mm Moisture Sensitivity Level (MSL) – This product is Hermetically Sealed and not Moisture Sensitive - MSL = N/A: Not Applicable

KAD7001

Abstract: SBX1610-52 sony SBX1610-52 LA2785 UPC177C ST L7805CV NJM79L05A SBX1810-52 sbx1610 MC34063P1
Contextual Info: 12/11/02 NJR Corporation Cross Reference Guide Sorted by Part Number Winter 2003 Competing Part Number AD66761 AN1311 AN1311S AN1319 AN1319S AN1339 AN1339NS AN1393 AN1393NS AN1432 AN1458 AN1458S AN311 AN311S AN6572 AN7810 AN78L06 AN78L08 AN78L09 AN78L18 AN78L20

K511TB1

Abstract: K500TM133T k176kt1 KM155DA3 K155PE3 K500TM131M K511TB K155A K155Kn7 k589
Contextual Info: M H T E rP A il bH blE MMKPOCXEMbl IN T E G R A T E D M IC R O C IR C U IT S H acT b Part I I klH TETPA Jlb H b lE M M KPOCXEM bl U M O P O Bb lE IN TE G R A T ED D IGITAL M ICRO CIRCU ITS B c n e flC T B M e H e n p e p b iB H o r o c o B e p u u e H C T b o b 3 h h j i

PCI-EXP-T42G5-N1

Abstract: pci express dllp serdes tutorial pci express tlp ORT42G5 ORT82G5 parallel scrambler PCI dllp phy interface for the PCI Express
Contextual Info: PCI Express December 2003 IP Data Sheet • Credit Availability Calculation and Reporting ■ Documentation and Files Features ■ Lane Width of x1 Configuration ■ Effective Raw Data Rate of 2.5Gbps/Lane/Direction with Target Device Support ■ 8b/10b Encoding/Decoding for Symbols

j123

Contextual Info: ORCA ORSPI4 Evaluation Board User’s Guide July 2004 ebug06_01 ORCA ORSPI4 Evaluation Board User’s Guide Lattice Semiconductor Introduction This user’s guide describes the Lattice evaluation board for the ORSPI4 device, a stand-alone evaluation PCB that