PIN CONFIGURATION 74LS132 Search Results

Contextual Info: GD54/74LS132 QUAD 2-INPUT NAND GATES WITH SCHMITT TRIGGER INPUtS Features Pin Configuration • Suitable for waveforms shaping applications • Wide hysteresis width 0 .8 V typical and high noise margin Vcc 4B 4A 4Y 3B 3A 3Y 1A 1ß 1V 2A 2B 2Y GND Description

VT10L

Contextual Info: M ITSU B ISH I HIGH SPEED CMOS M 74H C 132P /FP /D P QUADRUPLE 2 -IN P U T S C H M IT T -T R IG G E R P O S IT IV E NAND GATE DESCRIPTION T h e M 7 4 H C 1 3 2 is a sem iconductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW sisting of four 2-inp ut S ch m itt-trig g er positive-logic N A N D

ic 74132

Abstract: ucy-74132 n
Contextual Info: 7 4 1 3 2 , LS1 3 2 Schm itt Triggers S ig n e tic s Quad 2-Input NAND Schmitt Trigger Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 74132 15ns 21 mA 74LS132 15ns 7mA T h e '1 3 2 contains four 2-input N A N D

intel 8061

Abstract: 8061 intel LT1587ADJ IBM motherboard schematics 370 Intel G33 express chipset Intel G33 MOTHERBOARD CIRCUIT diagram FET SI4562DY G37 IC sio lpc chip intel p4 motherboard Z6 ITT
Contextual Info: b R Intel 820 Chipset Design Guide Addendum For the Intel® Pentium® III Processor for the PGA370 Socket Addendum to the Intel® 820 Chipset Design Guide April, 2000 Order Number: 298178 - 002 R Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

AN52

Abstract: AN5201 diode b32 1k variable resistor TDC4611 TMC1175 resistor 20w SCHEMATIC 10kw Power Amplifier 1N4148 74LS132
Contextual Info: www.fairchildsemi.com Application Note 52 The Evaluation Board for the TMC1175/TDC3310 The TMC1175E1C Evaluation Board brings all of the circuitry together for evaluating Fairchild's TMC1175 CMOS A/D converter and the TDC3310 10-bit D/A converter. The A/D and D/A signal paths are independent but easily configurable at the edge connector for reconstruction of A/D converter data with the D/A converter. Data is registered after

PIN CONFIGURATION 74LS132

Abstract: AN5201 74ALS821 TDC3310N6C TDC3310 74ls132 1N4148 sma potintiometer J10 DIODE
Contextual Info: www.fairchildsemi.com Application Note 58 The Evaluation Board for the TMC1175/TDC3310 The TMC1175E1C Evaluation Board brings all of the circuitry together for evaluating Fairchild's TMC1175 CMOS A/D converter and the TDC3310 10-bit D/A converter. The A/D and D/A signal paths are independent but easily configurable at the edge connector for reconstruction of A/D converter data with the D/A converter. Data is registered after

74LS132N

Abstract: diode c05*10 Robinson Nugent ICA-243-S-TG TDC3310 1n4148 D035 HPS-03-G C052C104K5X5CA Robinson Nugent ICA-243 NSH-12DB-S2-TR
Contextual Info: Electronics Semiconductor Division TMC1175AE1C The Evaluation Board for the TMC1175AE1C Description The TMC1175AE1C Evaluation Board brings all of the circuitry together for evaluating Raytheon Electronics’ TMC1175A CMOS A/D converter and the TDC3310 10-bit

74ls132n

Abstract: diode c05*10 1N4148 sma RPE122Z5U104M50V HPS-03-G ICA-286-S-TG NSH-02SB-S2-TR sealectro coax connector ICA286-STG marking U7 SMA
Contextual Info: www.fairchildsemi.com TMC1175AE1C The Evaluation Board for the TMC1175AE1C Description The TMC1175AE1C Evaluation Board brings all of the circuitry together for evaluating Fairchild Semiconductors’ TMC1175A CMOS A/D converter and the TDC3310 10-bit D/A converter. The A/D and D/A signal paths are independent but easily configurable at the edge connector for

Intel L440GX MOTHERBOARD Schematics

Abstract: RP5A WIRING DIAGRAM c151A sio lpc chip intel p4 motherboard 82801 g SCHEMATIC DIAGRAM C379A Intel Mobile Celeron Mendocino intel 80.82 4n606 transistor C388A
Contextual Info: Intel-Based Electronic Classroom Student Computing Station Based on the Intel Celeron Processor and Intel® 810 Chipset Reference Configuration August 2000 Order Number: 273292-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

74LS132 truth table

Abstract: 74HC132 equivalent 74HC00 tPHL 74hc00 3baa aa4b
Contextual Info: r r 7 SCS-THOMSON Ä 7 # « M IL IO T M O Ü S ms4HC132 M74HC132 QUAD 2-INPUT SCHMITT NAND GATE HIGH SPEED tpo = 11 ns TYP. AT Vcc = 5 V LOW POWER DISSIPATION Icc = 1fxA (MAX.) AT T a = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTLLOADS HIGH NOISE IMMUNITY V h (TYP.) = 0.9 V AT Vcc = 5 V

74HC132 equivalent

Abstract: 74HC132 74HC00 74hc00 tphl tplh
Contextual Info: fZ J M54HC132 M74HC132 S G S T H O M S O N HD Q I[Li©Tri(Q)iD©Ì QUAD 2-INPUT SCHMITT NAND GATE • HIGH SPEED tPD = 21 ns (TYP.) at Vc c = 5V ■ LOW POWER DISSIPATION lCc = 1 /*A (MAX.) at T a = 2 5 ° C ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ HIGH NOISE IMMUNITY

74LS132 truth table

Contextual Info: TOSHIBA TC74HC132AP/AF/AFN Quad 2-Input Schmitt NAND Gate The TC74HC132A is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

74HC132B

Contextual Info: M54HC132 M74HC132 SGS-THOMSON « im iO T O K S QUAD 2-INPUT SCHMITT NAND GATE • HIGH SPEED tpD = 11 ns TYP. AT V c c = 5 V ■ LOW POWER DISSIPATION Ice = 1fiA (MAX.) AT Ta = 25 °C ■ OUTPUT DRIVE CAPABILITY 10 LSTTLLOADS ■ HIGH NOISE IMMUNITY V h (TYP.) = 0.9 V AT Vcc = 5 V

Contextual Info: SbE D • 7 ^ 2 3 7 □ □ a 'îû ? ! 1=14 ■ SGTH / T T S C S -T H O M S O N ^7# HO g ®i[Li(girMD(gi M54HC132 M74HC132 S G S-TH0nS0N T - ^ - Z / QUAD 2-INPUT SCHMITT NAND GATE ■ HIGH SPEED tPD = 21 ns (TYP. at VCc = 5V ■ LOW POWER DISSIPATION

M74HC132B1

Abstract: SGS-Thomson 74hc00 74HC Logic Package Information 74HC00 SGS Thomson microelectronics IC 74HC00 M54HC132 M54HC132F1R M74HC132 M74HC132B1R M74HC132C1R
Contextual Info: M54HC132 M74HC132 QUAD 2-INPUT SCHMITT NAND GATE . . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1µA (MAX.) AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS HIGH NOISE IMMUNITY VH (TYP.) = 0.9 V AT VCC = 5 V SYMMETRICAL OUTPUT IMPEDANCE

npn transistor bc148 datasheet

Abstract: pin configuration NPN transistor BC148 TRANSISTOR BC135 BC148 pin configuration 82801 g SCHEMATIC DIAGRAM transformer EC28 SMBus socket AM2 pinout 741G08 pin configuration NPN transistor BC147
Contextual Info: R Intel 810E2 Chipset Platform For Use With Universal Socket 370 Design Guide September 2001 Document Number: 298303-001 R ® Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

Contextual Info: TC74HC132AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC132AP,TC74HC132AF,TC74HC132AFN Quad 2-Input Schmitt NAND Gate The TC74HC132A is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gate C2MOS technology.

TC74HC132AF

Abstract: TC74HC132AFN TC74HC132AP 74LS132 DIP14-P-300-2
Contextual Info: TC74HC132AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC132AP,TC74HC132AF,TC74HC132AFN Quad 2-Input Schmitt NAND Gate The TC74HC132A is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gate C2MOS technology.

2AP Diode

Abstract: 6 pin sim
Contextual Info: TC74HC132AP/AF/AFN TO SH IB A TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC132AP, TC74HC132AF, TC74HC132AFN Note The JEDEC SOP (FN) is not available in QUAD 2 - IN P U T S C H M IT T NAND GATE Japan The TC74HC132A is a high speed CMOS 2-INPUT NAND

74LS132 truth table

Abstract: 74LS132 DIP14-P-300-2 TC74HC132AF TC74HC132AFN TC74HC132AP
Contextual Info: TOSHIBA TC74HC132AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC132AP, TC74HC132AF, TC74HC132AFN QUAD 2 -INPUT SCHMITT NAND GATE Note The JEDEC SOP (FN) is not available in Japan The TC74HC132A is a high speed CMOS 2-INPUT NAND

Contextual Info: TOSHIBA TC74HC132AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC132AP, TC74HC132AF, TC74HC132AFN QUAD 2 -IN P U T SCHMITT NAND GATE Note The JEDEC SOP (FN) is not available in Japan The TC74HC132A is a high speed CMOS 2-INPUT NAND

74LS132 truth table

Abstract: 74LS132 DIP14-P-300-2 TC74HC132AF TC74HC132AFN TC74HC132AP
Contextual Info: TC74HC132AP/AF/AFN TO SHIBA TO SH IBA CM OS D IG ITAL IN TEGRATED CIRCUIT SILICON M O NO LITHIC TC74HC132AP, TC74HC132AF, TC74HC132AFN QUAD 2 -INPUT SCHMITT NAND GATE Note The JEDEC SOP (FN) is not available in Japan The TC74HC132A is a high speed CMOS 2-INPUT NAND

Contextual Info: TC74HC132AP/AF/AFN QUAD 2 - I N P U T S CHMI TT NA N D GATE The TC74HC132A is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m aintaining the CMOS low power

npn transistor bc148 datasheet

Abstract: pin configuration NPN transistor BC147 BC148 pin configuration BC157 DATA SHEET npn transistor smd w19 pin configuration NPN transistor BC148 DATASHEET OF TRANSISTOR BC158 TRANSISTOR BC135 TRANSISTOR BC147 jog image bc159 npn switching transistor
Contextual Info: R Intel 810E2 Chipset Platform Design Guide January 2001 Document Number: 298248-001 ® Intel 810E2 Chipset Platform R Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual