00XXX001
Abstract: BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12
Text: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Baseline FPGA family used in Series 3+ FPSCs field programmable system chips which combine FPGA logic
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OR3T20
OR3T30
1A-06.
OR3T80
00XXX001
BA 5979
R15C3
OR3T125
OR3T20
OR3T30
OR3T55
PT10
PT11
PT12
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LCMXO2-1200HC-4TG100C
Abstract: LCMXO2-256HC-4TG100I LCMXO2-1200 tn1200 lcmxo2 LCMXO2-1200HC-4TG100 LCMXO2-2000 LCMXO2-7000 MachXO2-1200 LCMXO2-4000HC
Text: MachXO2 Family Handbook HB1010 Version 01.0, November 2010 MachXO2 Family Handbook Table of Contents November 2010 Section I. MachXO2 Family Data Sheet Introduction Features . 1-1
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HB1010
LCMXO2-1200HC-4TG100C
LCMXO2-256HC-4TG100I
LCMXO2-1200
tn1200
lcmxo2
LCMXO2-1200HC-4TG100
LCMXO2-2000
LCMXO2-7000
MachXO2-1200
LCMXO2-4000HC
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transistor pt36c
Abstract: gp714 diode GP113 transistor pt42c diode gp116 GP114 GP021 PT36c gp627 GP111
Text: OR4E FPGA Ver 2.0 1 4/1/2002 Lattice Semiconductor Corp Series 4 FPGA Evaluation Board Diagram Revision 2.0 OR4E FPGA Ver 2.0 2 4/1/2002 Lattice Semiconductor Corp JTAG Programming Connection J55 Schematic page 4 An 8-pin connection to the JTAG interface used for programming.
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ADDR17
ADDR16
DATA31
DATA30
DATA29
DATA28
DATA27
DATA26
DATA25
DATA24
transistor pt36c
gp714 diode
GP113
transistor pt42c
diode gp116
GP114
GP021
PT36c
gp627
GP111
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30021
Abstract: L48C L41C IC L44C DATASHEET L30C l31c L43C ORSO42G5 ORSO82G5 ORT42G5
Text: ORCA ORSO42G5 and ORSO82G5 0.6 - 2.7 Gbps SONET Backplane Interface FPSCs August 2005 Data Sheet Introduction Lattice has extended its family of high-speed serial backplane devices with the ORSO42G5 and ORSO82G5 devices. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSO42G5 and
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ORSO42G5
ORSO82G5
ORSO82G5
ORSO42G5-1BMN484I
ORSO82G5-2FN680I
30021
L48C
L41C
IC L44C DATASHEET
L30C
l31c
L43C
ORT42G5
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Untitled
Abstract: No abstract text available
Text: ORCA ORLI10G Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC August 2004 Data Sheet Introduction The Lattice ORCA Series 4-based ORLI10G FPSC combines a high-speed line interface with a flexible FPGA logic core. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORLI10G consists
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ORLI10G
10Gbps
125Gbps,
ORLI10G
OIF-SFI4-01
16-bit
ORLI10G-2BMN680I
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pt45
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.2, June 2006 LatticeSC Family Data Sheet Introduction June 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
110mW
VCC12.
LFSC25
900-Ball
pt45
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IC TTL 7495 diagram and truth table
Abstract: BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc
Text: Data Sheet June 1999 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 µm OR3C and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in
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DS99-087FPGA
DS98-163FPGA-01)
IC TTL 7495 diagram and truth table
BA 5979 S
AM 5766
BA 5979
motorola s240
pin diagram of ic 7495
Xilinx counter
transistor on 4409
PR25D
inverter design using plc
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PT35c transistor
Abstract: pt35c transistor pt36c me 4946 PBGA PR25D transistor on 4409 307-45 4946 ah lm 458 ic
Text: Data Addendum March 2002 ORCA OR3LxxxB Series Field-Programmable Gate Arrays Introduction This data addendum refers to the information found in the ORCA® Series 3C and 3T Field-Programmable Gate Arrays Data Sheet. • ■ Features ■ ■ ■ ■ ■ ■
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16-bit
OR3L165B
OR3L225B
OR3L165B7PS208I-DB
OR3L165B7PS240I-DB
OR3L165B7BA352I-DB
OR3L165B7BC432I-DB
OR3L165B7BM680I-DB
OR3L225B7BC432I-DB
OR3L225B7BM680I-DB
PT35c transistor
pt35c
transistor pt36c
me 4946
PBGA
PR25D
transistor on 4409
307-45
4946 ah
lm 458 ic
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transistor pt36c
Abstract: datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram
Text: Data Sheet November, 2003 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:
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sink/12
transistor pt36c
datasheet transistor pt36C
PT35c transistor
pt36c
microprocessor block diagram of plc
pt35c
transistor pt42c
PT42C
transistor BC 157
PLC Communication cables pin diagram
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BA 5979 S
Abstract: or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10
Text: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 m OR3C and 0.3 μm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in
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OR3C804PS208I-DB
OR3C804BA352I-DB
OR3T206S208I-DB
OR3T306S208I-DB
OR3T306S240I-DB
OR3T306BA256I-DB
OR3T556PS208I-DB1
OR3T556S208I-DB
OR3T556PS240I-DB
OR3T556BA256I-DB
BA 5979 S
or3t806ba352-db
2764 EEPROM
BA 5979
BL06 transistor
OR3T125
OR3T20
OR3T30
OR3T55
PT10
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Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
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Untitled
Abstract: No abstract text available
Text: ORCA ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver November 2003 Data Sheet Introduction Field Programmable System-on-a-Chip (FPSCs) bring a whole new dimension to programmable logic: Field Programmable Gate Array (FPGA) logic and an embedded system solution on a single device. Lattice has developed
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ORT8850
ORT8850
channel50H-1BM680C
ORT8850H
ORT8850L
ORT8850H
ORT8850L-2BM680I
ORT8850L-1BM680I
ORT8850H-1BM680I
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet Version 01.1, April 2006 LatticeSC Family Data Sheet Introduction April 2006 Preliminary Data Sheet Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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700MHz
622Mbps
125Gbps)
100mW
TN1101)
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1-256 demultiplexer
Abstract: No abstract text available
Text: ORCA ORLI10G Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC November 2003 Data Sheet Introduction Lattice has developed a new ORCA Series 4-based FPSC which combines a high-speed line interface with a flexible FPGA logic core. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the
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ORLI10G
10Gbps
125Gbps,
ORLI10G
OIF-SFI4-01
16-bit
ORLI10G-3BM680C
ORLI10G-2BM680C
ORLI10G-1BM680C
1-256 demultiplexer
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PT15D
Abstract: OR2T40A-6PS208I R4C18
Text: Data Sheet August 2002 ORCA Series 2 Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, low-power 0.35 µm CMOS technology OR2CxxA , 0.3 µm CMOS technology (OR2TxxA), and 0.25 µm CMOS technology
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16-bit
32-bit
OR2T10A
OR2T15A
OR2T15B
OR2T26A
OR2T40A
OR2T40B
DS99-094FPGA
DS98-022FPGA)
PT15D
OR2T40A-6PS208I
R4C18
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AD30102
Abstract: E3P15
Text: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs March 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the
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ORT42G5
ORT82G5
ORT82G5
ORT42G5-2BM484I
ORT42G5-1BM484I
ORT82G5-2BM680I
ORT82G5-1BM680I
AD30102
E3P15
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.4b, February 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
SC115
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Untitled
Abstract: No abstract text available
Text: ORCA ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver November 2002 Data Sheet Introduction Field Programmable System-on-a-Chip (FPSCs) bring a whole new dimension to programmable logic: Field Programmable Gate Array (FPGA) logic and an embedded system solution on a single device. Lattice has developed
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ORT8850
ORT8850
ORT8850L
ORT8850H
M-ORT8850L2BM680-DB
M-ORT8850L1BM680-DB
M-ORT8850H2BM680-DB
M-ORT8850H1BM680-DB
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ORCA ORT42G5
Abstract: No abstract text available
Text: ORCA ORT42G5 and ORT82G5 3.7 Gbits/s XAUI and 4.25 Gbits/s FC FPSCs November 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the
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ORT42G5
ORT82G5
ORT82G5
ORT42G5-2BM484ES
ORT42G5-1BM484ES
ORT82G5-2BM680I
ORT82G5-1BM680I
ORCA ORT42G5
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Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 01.6, August 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
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AL437
Abstract: L97c L235C L103T L41C L140C L94C l165c L239C L43C
Text: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC November 2003 Preliminary Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two
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8b/10b
OIF-SPI4-02
ORSPI4-1FE1036IES
ORSPI4-F1156IES
ORSPI4-2FE1036CES
ORSPI4-1FE1036CES
ORSPI4-2F1156CES
ORSPI4-1F1156CES
AL437
L97c
L235C
L103T
L41C
L140C
L94C
l165c
L239C
L43C
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BA 5979
Abstract: br06 lm 398- SAMPLE AND HOLD OR3T125 OR3T20 OR3T30 OR3T55 PT10 diagram for 3 bits binary multiplier circuit ic 7490 truth table
Text: Data Sheet March 2002 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 µm OR3C and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in
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F59SSV
Abstract: No abstract text available
Text: RED INDICATES ORIGINAL □ASH NO -2 -3 -4 -5 -6 -9 -1 0 -1 1 -12 -13 -1 4 -15 -IB -17 -IB -19 -2 0 -21 TABLE 1 IMPD MATERIAL CONN TYPE DHMS PL220 1-0442-025 CJ220 1-0443-025 PL240 1-0446-025 CJ240 1-0445-025 50 BJ226 1-0472-025 BJ229 1-0473-025 BJ246 1-0046-025
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PL220
CJ220
PL240
CJ240
BJ226
BJ229
BJ246
BJ249
PL22D
1-046B-025
F59SSV
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Untitled
Abstract: No abstract text available
Text: AT&T Data Sheet October 1995 Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 |im technology (four-input look-up table delay less than 3.6 ns)
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ATT2C04,
ATT2C06,
ATT2C08,
ATT2C10,
ATT2C12,
ATT2C15,
ATT2C26,
ATT2C40.
DS95-183FPGA
DS95-031
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