PLH23 Search Results

Contextual Info: CDC536 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS378-APRIL 1994 ' Low Output Skew for Clock-Distribution and Clock-Generation Applications DL PACKAGE TOP VIEW * Operates at 3.3-V Vcc u ’ Distributes One Clock Input to Six Outputs ' One Select Input Configures Up to Three

RH-1750

Abstract: RH1750 qml-38535 PLH23 PHL27
Contextual Info: REVISIONS LTR DESCRIPTION DATE APPROVED YR-MO-DA REV SHEET REV SHEET 15 16 17 REV STATUS OF SHEETS PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE 18 19 20 21 22 23 24

2901C

Contextual Info: _D J^ T R IB U T IO N S T A T E M E N T A ^ Approved for public re le a se ; distribution is unlim ited. DESC FORM 193 MAY B6 1. SCOPE 1.1 Scope. T h is drawing d e scrio e s d evice requirem ents fo r c la s s B m ic r o c ir c u it s in accordance with 1 .2 .1 o f MlL-STD-883, “P ro v isio n s fo r the use o f MIL-STD-883 in co n ju n ctio n w ith com pliant non-JAN

daq 6008

Abstract: AM2901C/BQA ABAZ Mostek 6008 2901c AM2901c-BYC PHL22 F0736 UI5 321
Contextual Info: D E S C FORM 193 MAY B6 This Material Copyrighted By Its Respective Manufacturer ± 1. SCOPE 1.1 Scope. T h is drawing d e scrio e s d evice renuirem ents fo r c la s s B m ic r o c ir c u it s in accordance with

CDC2586

Abstract: CDC586
Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SC A S 337- FEBRUARY 1993 - REVISED MARCH 1994 Edge-Triggered Clear for Half-Frequency Outputs TTL-Compatible Inputs and Outputs Outputs Have Internal 26-Q Series Resistors to Dampen Transmission Line

Contextual Info: CDC2582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS SCAS379 - FEBRUARY 1993 - REVISED MARCH 1994 Application for Synchronous DRAMs Outputs Have Internal 26-Q Series Resistors To Dampen Transmission Line Effects Edge-Triggered Clear for Half-Frequency

Contextual Info: CDC2536 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _SCAS3 7 7 - APRIL 1994 D L PACKAGE TOP VIEW 1 U 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 description

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _ SCAS337 - FEBRUARY 1993 - REVISED MARCH 1994 * Edge-Triggered Clear for Half-Frequency Outputs * TTL-Compatible Inputs and Outputs * Outputs Have Internal 26-Q Series Resistors to Dampen Transmission Line

Contextual Info: CDC586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _ SCAS336 - FEBRUARY 1993 - REVISED MARCH 1994 • ■ * Low Output Skew for Clock-Dlstribution and Clock-Generation Applications * Application for Synchronous DRAM, High-Speed Microprocessor

CDC536

Contextual Info: CDC536 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS378 - APRIL 1994 DL PACKAGE TOP VIEW 1 u 28 2 27 3 26 4 25 5 24 6 23 7 22

3 phase waveform generator

Abstract: CDC2536
Contextual Info: CDC2536 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _ SCAS377 - APRIL 1994 DL PACKAGE TOP VIEW 1 2 3 4 5 6 8 9 10 11 12 13 14 u 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Distributed Vcc and Ground Pins Reduce Switching Noise Packaged in Platic 28-Pin Shrink Small

CDC586

Contextual Info: CDC586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS S C A S 336- FEBRUARY 1993 - REVISED MARCH 1994 Application for Synchronous DRAM, High-Speed Microprocessor Edge-Triggered Clear for Half-Frequency Outputs TTL-Compatible Inputs and Outputs Outputs Drive 50-Q Parallel-Terminated

smlx

Abstract: 2901c ABAZ daq 6008 phl40 LH27
Contextual Info: D E S C FORM 193 MAY B6 Powered by ICminer.com Electronic-Library Service CopyRight 2003 ± 1. SCOPE 1.1 Scope. This drawing descrioes device renuirements fo r c la s s B m icro circu its in accordance with

Contextual Info: CDC2582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS SCAS379 - FEBRUARY 1993 - REVISED MARCH 1994 Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V V cc Distributes Differential LVPECL Clock

diode sy 170/10

Abstract: Z80A sti "General Instrument" DO-7 Diode Marking Z80A DMA pes 5003 p type iii z80a-dma ilo1
Contextual Info: MIL-M-38510/482A{USAF 18 June 1984 QUALIFICATION REQUIREMENTS REMOVED SUPERSEDING!-MIL-M-38510/482 USAF) 16 M a r c h 1982 MILITARY MICROCIRCUITS, MONOLITHIC I INACTIVE SPECIFICATION DIGITAL, N-CHANNEL, DIRECT MEMORY ACCE SS FOR NEW DESIGN AFTER