PLL520 Search Results

Contextual Info: PLL520-80 Low Phase Noise VCXO 9.5-65MHz DIE CONFIGURATION FEATURES XIN DIE SPECIFICATIONS Name Value Size Reverse side Pad dimensions Thickness 62 x 65 mil GND 80 micron x 80 micron 10 mil OUTSEL0^ VDD VDD VDD VDD N/C Reserved OUTSEL1^ 24 23 22 21 20 19

PLL520-05

Abstract: PLL520-06 PLL520-07 PLL520-08 PLL520-09 03 07 qfn 3x3 P52006
Contextual Info: PLL520-05/-06/-07/-08/-09 Low Phase Noise VCXO with multipliers for 100-200MHz Fund Xtal PIN CONFIGURATION (Top View) 16 SEL0^ XIN 2 15 SEL1^ XOUT 3 14 GND SEL3^ 4 13 CLKC SEL2^ 5 12 VDD OE 6 11 CLKT VCON 7 10 GND GND 8 9 GND BLOCK DIAGRAM 14 SEL2^ 15 OE

Varicaps Capacitors

Abstract: PLL520-20
Contextual Info: Preliminary PLL520-20 Low Phase Noise VCXO for 120-200MHz Fundamental Crystals FEATURES 65 mil 120MHz to 200MHz Fundamental Mode Crystal. Output range: 120MHz – 200MHz (no PLL). Low Injection Power for crystal 50uW. Complementary outputs: CMOS, PECL or LVDS.

PLL520-05

Abstract: PLL520-06 PLL520-07 PLL520-08 PLL520-09 Varicaps
Contextual Info: PLL520-05/-06/-07/-08/-09 Low Phase Noise VCXO with multipliers for 120-200MHz Fund Xtal Universal Low Phase Noise IC’s FEATURES XIN 2 15 SEL1^ XOUT 3 14 GND SEL3^ 4 13 CLKC SEL2^ 5 12 VDD OE 6 11 CLKT VCON 7 10 GND GND 8 9 GND SEL OE X+ X- Oscillator

PLL520-56

Abstract: PLL520 PLL5205
Contextual Info: Preliminary PLL520-56 Hi-Drive CMOS Low Phase Noise VCXO for 25-55MHz Fund Xtal PIN CONFIGURATION FEATURES 25MHz to 55MHz Fundamental Mode Crystal. Output range: 25MHz – 55MHz (no PLL). Integrated variable capacitors. High Current CMOS output drive (45pF CLoad).

PLL520-50

Contextual Info: Preliminary PLL520-50 CMOS Low Phase Noise VCXO w/ Div. by 2 for 25-55MHz Fund Xtal FEATURES • • • • • 65 mil 25MHz to 55MHz Fundamental Mode Crystal. Output range: 12.5MHz – 55MHz (no PLL, selectable divider by 2). CMOS output (selectable output drive current).

PLL520-38

Abstract: PLL520-38OC PLL520-38OC-R PLL520-38QC PLL520-38QC-R PLL520-39 PLL520-39OC PLL520-39OC-R PLL520-39QC
Contextual Info: PLL520-38/-39 PECL and LVDS Low Phase Noise VCXO for 65-130MHz Fund Xtal FEATURES N/C XIN 2 15 N/C XOUT 3 14 GND N/C 4 13 CLKC N/C 5 12 VDD OE 6 11 CLKT VCON 7 10 N/C GND 8 9 N/C XIN XOUT Amplifier w/ integrated varicaps Q Q N/C N/C 12 13 11 10 9 14 N/C

Contextual Info: Using PhaseLink Integrated XO / VCXO IC’s as 3rd Overtone LVDS XO drivers Application Note for PLL520-00/-10/-30, PLL620-00/-20, P663-09 and PLL621-49 Aug. 2003 www.phaselink.com 47745 Fremont Blvd., Fremont, CA 94538 PECL XO and VCXO Products with Fundamental and with 3rd OT

XTAL Test

Abstract: PLL520-30
Contextual Info: Preliminary PLL520-30 PECL and LVDS Low Phase Noise VCXO for 65-130MHz Fund Xtal FEATURES 65 mil 65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz – 130MHz (no PLL). Low Injection Power for crystal 50uW. Complementary outputs: PECL or LVDS.

PLL520-57

Contextual Info: Preliminary PLL520-57 CMOS Low Phase Noise VCXO for 25-55MHz Fund Xtal PIN CONFIGURATION FEATURES 25MHz to 55MHz Fundamental Mode Crystal. Output range: 25MHz – 55MHz (no PLL). Integrated variable capacitors. Standard CMOS output drive (15 pF CLoad). Supports 3.3V-Power Supply.

Varicaps Capacitors

Abstract: PLL520-47
Contextual Info: Preliminary PLL520-47 CMOS Low Phase Noise VCXO for 65-130MHz Fund Xtal FEATURES 65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz – 130MHz (no PLL). Low Injection Power for crystal 50uW. CMOS outputs. Integrated variable capacitors. Supports 3.3V-Power Supply.

PLL520-17

Abstract: PLL520-17OC PLL520-17OC-R PLL520-17SC PLL520-17SC-R PLL520-18 PLL520-18OC PLL520-19
Contextual Info: PLL520-17/-18/-19 Low Phase Noise VCXO with multipliers for 65-130MHz Fund Xtal FEATURES • • 65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz – 800MHz (selectable 1x, 2x, 4x and 8x multipliers). Low Injection Power for crystal 50uW. Available outputs: PECL, LVDS, or CMOS.

Contextual Info: PLL520-00 Low Phase Noise VCXO with multipliers for 100-200MHz Fund Xtal FEATURES OUTSEL0^ VDD VDD VDD VDD SEL0^ SEL1^ OUTSEL1^ 23 22 21 20 19 18 17 26 Die ID: A1919-19A XOUT 27 SEL3^ 28 SEL2^ 29 OE CTRL 30 VCON 31 C502A 16 CMOS 15 LVDSB 14 PECLB 13 12 VDDBUF

Contextual Info: Using PhaseLink Integrated XO / VCXO IC’s as 3rd Overtone PECL XO drivers Application Note for PLL520-00/-10/-30. PLL620-00/-20, P663-08 and PLL621-48 Aug. 2002 revised Aug. 2003 www.phaselink.com 47745 Fremont Blvd., Fremont, CA 94538 PECL XO and VCXO Products

Varicaps Capacitors

Abstract: VARICAPS PLL520-40
Contextual Info: Preliminary PLL520-40 CMOS Low Phase Noise VCXO for 65-130MHz Fund Xtal FEATURES 65 mil 65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz – 130MHz (no PLL). Low Injection Power for crystal 50uW. CMOS outputs. Integrated variable capacitors.

a2020

Abstract: C502A E5500 PLL520-80
Contextual Info: PLL520-80 Low Phase Noise VCXO 9.5-65MHz DIE CONFIGURATION FEATURES XIN DIE SPECIFICATIONS Name Value Size Reverse side Pad dimensions Thickness 62 x 65 mil GND 80 micron x 80 micron 10 mil OUTSEL0^ VDD VDD VDD VDD N/C Reserved OUTSEL1^ 24 23 22 21 20 19

TB502

Contextual Info: TB502-3x-520-xx Test Board for chip evaluation and Layout recommendations A generic test board for the PLL502-3x and PLL520-0x/-1x/-2x/-3x/-4x/-7x In order to provide an example of recommended layout for PLL502-3x and PLL520-xx products, PhaseLink provides a

PLL520-00

Abstract: PLL520-00D1
Contextual Info: Preliminary PLL520-00D1 Low Phase Noise VCXO with multipliers for 120-200MHz Fund Xtal FEATURES • • • • • • 65 mil 120MHz to 200MHz Fundamental Mode Crystal. Output range: 120 – 200MHz (no multiplication), 240 – 400MHz (2x multiplier) or 480 – 700MHz

E5500

Abstract: PLL520-88OC PLL520-88OC-R PLL520-89OC PLL520-89OC-R
Contextual Info: Preliminary PLL520-88/-89 Low Phase Noise VCXO 9.5-65MHz FEATURES 19MHz to 65MHz fundamental crystal input. Output range: 9.5MHz – 65MHz Complementary outputs: PECL or LVDS output. Selectable OE Logic (enable high or enable low). Integrated variable capacitors.

Varicaps Capacitors

Abstract: PLL520-38 PLL520-39
Contextual Info: Preliminary PLL520-38/-39 PECL and LVDS Low Phase Noise VCXO for 65-130MHz Fund Xtal Universal Low Phase Noise IC’s FEATURES 65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz – 130MHz (no PLL). Low Injection Power for crystal 50uW. PECL (PLL520-38) or LVDS output (PLL520-39).

P520-00DC

Abstract: PLL520-00 PLL520-00DC
Contextual Info: Preliminary PLL520-00 Low Phase Noise VCXO with multipliers for 120-200MHz Fund Xtal FEATURES • • • • • • 65 mil 120MHz to 200MHz Fundamental Mode Crystal. Output range: 120 – 200MHz (no multiplication), 240 – 400MHz (2x multiplier) or 480 – 700MHz

C502A

Abstract: P520-10DC PLL520-10 PLL520-10DC Varicaps Capacitors
Contextual Info: PLL520-10 Low Phase Noise VCXO with multipliers for 65-130MHz Fund Xtal FEATURES BLOCK DIAGRAM SEL OE VCON Oscillator Amplifier w/ X+ integrated varicaps PLL (Phase Locked Loop) OUTSEL0^ VDD VDD VDD VDD SEL0^ SEL1^ OUTSEL1^ 24 23 22 21 20 19 18 17 26 XOUT

PLL520-28

Abstract: PLL520-28OC PLL520-28OC-R PLL520-28QC PLL520-28QC-R PLL520-29 PLL520-29OC PLL520-29OC-R PLL520-29QC P520
Contextual Info: PLL520-28/-29 Low Phase Noise VCXO for 120-200MHz Fund Xtal FEATURES VDD 1 16 N/C XIN 2 15 N/C XOUT 3 14 GND N/C 4 13 CLKC N/C 5 12 VDD OE 6 11 CLKT VCON 7 10 N/C GND 8 9 N/C VDD N/C N/C XIN 12 13 11 10 9 N/C 15 OE 16 BLOCK DIAGRAM P520-2x 1 2 3 4 GND 14

C502A

Abstract: PLL520-20 clock ma 1042
Contextual Info: PLL520-20 Low Phase Noise VCXO for 100-200MHz Fundamental Crystals FEATURES DIE CONFIGURATION XIN VDD VDD VDD VDD DNC DNC OUTSEL1 (1550,1475) 25 24 23 22 21 20 19 18 17 26 Die ID: A1919-19B XOUT 27 DNC 28 DNC 29 OE 30 VCON 31 DESCRIPTION C502A BLOCK DIAGRAM