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    R11C5 Price and Stock

    Sensata Circuit Breakers ICLR1-1C-52-30.0-B-50-R

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    Sensata Circuit Breakers ICLR1-1C-51-4.00-B-00-U

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    Sensata Circuit Breakers ICLR1-1C-51-6.00-B-00-U

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    Sager ICLR1-1C-51-6.00-B-00-U 1
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    Sensata Circuit Breakers ICLR1-1C-52-30.0-AB-50-R

    CIR BRKR HYD MAG
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    R11C5 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    00XXX001

    Abstract: BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12
    Contextual Info: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Baseline FPGA family used in Series 3+ FPSCs field programmable system chips which combine FPGA logic


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    OR3T20 OR3T30 1A-06. OR3T80 00XXX001 BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12 PDF

    PL 15 Z EQUIVALENT

    Abstract: capacitor 1c5 10C6 12C4 14TX0614
    Contextual Info: 10.0-18.0 GHz GaAs MMIC Transmitter 14TX0614 September 2005 - Rev 01-Sep-05 Features Chip Device Layout tio n Integrated Mixer, LO Buffer and Output Amplifier 8 dB Conversion Gain 15 dB Image Rejection +17 dBm OIP3 +6 dBm LO Drive Level -12 dBm LO Leakage Power


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    14TX0614 01-Sep-05 MIL-STD-883 PL 15 Z EQUIVALENT capacitor 1c5 10C6 12C4 14TX0614 PDF

    Contextual Info: 32.0-42.0 GHz GaAs MMIC Image Reject Mixer 38IRM0363 April 2005 - Rev 30-Apr-05 Features Chip Device Layout tio n Sub-harmonic Image Reject Mixer GaAs HBT Technology 9.0 dB Conversion Loss 18.0 dB Image Rejection 100% On-Wafer RF Testing 100% Visual Inspection to MIL-STD-883


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    30-Apr-05 38IRM0363 MIL-STD-883 PDF

    Contextual Info: 12.0-40.0 GHz GaAs MMIC Image Reject Mixer M1001 April 2005 - Rev 30-Apr-05 Features Chip Device Layout Fundamental Image Reject Mixer 8.0 dB Conversion Loss 20.0 dB Image Rejection +25.0 dBm Input Third Order Intercept IIP3 100% On-Wafer RF Testing 100% Visual Inspection to MIL-STD-883


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    30-Apr-05 M1001 MIL-STD-883 PDF

    IC TTL 7495 diagram and truth table

    Abstract: BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc
    Contextual Info: Data Sheet June 1999 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 µm OR3C and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


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    DS99-087FPGA DS98-163FPGA-01) IC TTL 7495 diagram and truth table BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc PDF

    BA 5979 S

    Abstract: or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10
    Contextual Info: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 m OR3C and 0.3 μm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


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    OR3C804PS208I-DB OR3C804BA352I-DB OR3T206S208I-DB OR3T306S208I-DB OR3T306S240I-DB OR3T306BA256I-DB OR3T556PS208I-DB1 OR3T556S208I-DB OR3T556PS240I-DB OR3T556BA256I-DB BA 5979 S or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10 PDF

    11c7

    Abstract: 10C6 12C4 XU1005-BD R10C6 R11C7
    Contextual Info: 10.0-18.0 GHz GaAs MMIC Transmitter U1005-BD March 2007 - Rev 01-Mar-07 Features Integrated Mixer, LO Buffer and Output Amplifier 8 dB Conversion Gain 15 dB Image Rejection +17 dBm OIP3 +6 dBm LO Drive Level -12 dBm LO Leakage Power 100% On-Wafer RF and DC Testing


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    U1005-BD 01-Mar-07 MIL-STD-883 XU1005-BD XU1005-BD-000V XU1005-BD-EV1 XU1005 11c7 10C6 12C4 XU1005-BD R10C6 R11C7 PDF

    XM1003-BD

    Abstract: XM1003-BD-000V XM1003-BD-EV1
    Contextual Info: XM1003-BD Image Reject Mixer 32.0-42.0 GHz Rev. V1 Features Chip Device Layout •      Sub-harmonic Image Reject Mixer GaAs HBT Technology 9.0 dB Conversion Loss 18.0 dB Image Rejection 100% On-Wafer RF Testing 100% Visual Inspection to MIL-STD-883 Method


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    XM1003-BD MIL-STD-883 XM1003-BD XM1003-BD-000V XM1003-BD-EV1 PDF

    PT15D

    Abstract: OR2T40A-6PS208I R4C18
    Contextual Info: Data Sheet August 2002 ORCA Series 2 Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, low-power 0.35 µm CMOS technology OR2CxxA , 0.3 µm CMOS technology (OR2TxxA), and 0.25 µm CMOS technology


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    16-bit 32-bit OR2T10A OR2T15A OR2T15B OR2T26A OR2T40A OR2T40B DS99-094FPGA DS98-022FPGA) PT15D OR2T40A-6PS208I R4C18 PDF

    BA 5979

    Abstract: br06 lm 398- SAMPLE AND HOLD OR3T125 OR3T20 OR3T30 OR3T55 PT10 diagram for 3 bits binary multiplier circuit ic 7490 truth table
    Contextual Info: Data Sheet March 2002 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 µm OR3C and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


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    PDF

    BA 5979 S

    Abstract: how many pins in IC 4538 BA 5979 24 micro farad capacitor datasheet 3T80 transistor on 4409 AM 5766 ba 5412 PR25D or3t806ba352-db
    Contextual Info: Data Sheet December 2002 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 µm OR3C and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


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    OR3T806BA352I-DB OR3T806BC432I-DB OR3T1256PS208I-DB OR3T1256PS240I-DB OR3T1256BA352I-DB OR3T1256BC432I-DB OR3T1256BC600I-DB BA 5979 S how many pins in IC 4538 BA 5979 24 micro farad capacitor datasheet 3T80 transistor on 4409 AM 5766 ba 5412 PR25D or3t806ba352-db PDF

    Contextual Info: Data Sheet June 1999 microelectronics group Lucent Technologies Bell Labs Innovations ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • High-performance, cost-effective, 0.35 pm OR3C and 0.3 pm (OR3T) 4-level metal technology, (4- or 5-input


    OCR Scan
    GD3T75fci PDF

    Contextual Info: Datasheet microelectronics group June 1999 Lucent Technologies Bell Labs Innovations ORCA Series 2 Field-Programmable Gate Arrays Features • High-performance, cost-effective, low-power 0.35 pm CMOS technology OR2CxxA , 0.3 pm CMOS technology (OR2TxxA), and 0.25 pm CMOS technology


    OCR Scan
    16-bit PDF

    R11C5

    Contextual Info: 12.0-34.0 GHz GaAs MMIC Image Reject Mixer 20IRRFM0374 March 2005 - Rev 01-Mar-05 Features Chip Device Layout tio n Fundamental Image Reject Mixer 8.0 dB Conversion Loss 15.0 dB Image Rejection +15 dBm Input Third Order Intercept 100% On-Wafer RF Testing 100% Visual Inspection to MIL-STD-883


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    01-Mar-05 20IRRFM0374 MIL-STD-883 R11C5 PDF

    R9C10

    Abstract: R10C3
    Contextual Info: Preliminary Data Sheet September 1999 ORCA OR3TP12 Field-Programmable System Chip FPSC Embedded Master/Target PCI Interface Introduction Lucent Technologies Microelectronics Group has developed a solution for designers who need the many advantages of an FPGA-based design implementation coupled with the high bandwidth of an


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    OR3TP12 32-/64-bit DS99-307FPGA DS98-219FPGA-03) R9C10 R10C3 PDF

    R9C16

    Abstract: OR3T55 OR3TP12 PT10 PT11 PT12 PT13 PT14 PT15 PT16
    Contextual Info: Data Sheet October 2003 ORCA OR3TP12 Field-Programmable System Chip FPSC Embedded Master/Target PCI Interface Introduction Table 1. PCI Local Bus Data Rates Lattice has developed a solution for designers who need the many advantages of an FPGA-based design implementation coupled with the high bandwidth of the industry-standard PCI interface. The


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    OR3TP12 32-bit 64-bit. 32-/64-bit, 33/66MHz OR3T55 14x18 OR3TP12 OR3TP127BA256-DB OR3TP127BA352-DB R9C16 PT10 PT11 PT12 PT13 PT14 PT15 PT16 PDF

    EXO 32K

    Abstract: OR2C06A OR2C12A OR2T15B OR2T40B
    Contextual Info: Data Sheet November 2006 ORCA Series 2 Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, low-power 0.35 µm CMOS technology OR2CxxA , 0.3 µm CMOS technology (OR2TxxA), and 0.25 µm CMOS technology


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    16-bit 32-bit DS99-094FPGA DS98-022FPGA) EXO 32K OR2C06A OR2C12A OR2T15B OR2T40B PDF

    XM1003-BD

    Contextual Info: 32.0-42.0 GHz GaAs MMIC Image Reject Mixer M1003-BD February 2008 - Rev 06-Feb-08 Features Sub-harmonic Image Reject Mixer GaAs HBT Technology 9.0 dB Conversion Loss 18.0 dB Image Rejection 100% On-Wafer RF Testing 100% Visual Inspection to MIL-STD-883 Method 2010


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    M1003-BD 06-Feb-08 MIL-STD-883 XM1003-BD XM1003-BD-000V XM1003-BD-EV1 XM1003-BD PDF

    84-1LMI

    Abstract: XM1001
    Contextual Info: 12.0-40.0 GHz GaAs MMIC Image Reject Mixer M1001 November 2005 - Rev 21-Nov-05 Features Chip Device Layout Fundamental Image Reject Mixer 8.0 dB Conversion Loss 20.0 dB Image Rejection +25.0 dBm Input Third Order Intercept IIP3 100% On-Wafer RF Testing 100% Visual Inspection to MIL-STD-883


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    M1001 21-Nov-05 MIL-STD-883 84-1LMI XM1001 PDF

    XC4000E

    Abstract: XC4000XL XC4000XLA
    Contextual Info: FlibGen, FlibTime, and ChipView – Power Tools for FPGA Design No matter how awe-inspiring your latest FPGA design is, the next one will have to be even better. Three tools from Fliptronics can help you produce faster, denser designs in less time with less effort.


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    XC4000XL, XC4000XLA, 24-bit XC4000E, XC4000E XC4000XL XC4000XLA PDF

    R14C17

    Abstract: R16C17
    Contextual Info: September 1995 j-s #*•«*■ Microelectronics Optimized Reconfigurable Cell Array ORCA ATT2T15 (3.3 V) Field-Programmable Gate Array Features Description ■ High-performance, cost-effective 0.5 jam technology optimized for 3.3 V operation The ATT2T15 is the first device in this family opti­


    OCR Scan
    ATT2T15 ATT2T15 ATT2C15 005002b R14C17 R16C17 PDF

    RAM16X1D

    Abstract: XCV100PQ240 XAPP151 XCV100 4 bit microprocessor using vhdl and ucf file
    Contextual Info: APPLICATION NOTE APPLICATION NOTE  XAPP 153 June 7, 1999 Version 1.0 Status and Control Semaphore Registers Using Partial Reconfiguration 13* Application Note by Nick Camilleri Summary The Virtex FPGA Series supports partial reconfiguration of a cross-section of data while the rest of the circuit is still in operation. This enables a


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    RAM16X1D rambit02 rambit01 rambit00 XCV100PQ240 XAPP151 XCV100 4 bit microprocessor using vhdl and ucf file PDF

    multiplier using CARRY SELECT adder

    Abstract: R12C20 R3C15 RuC15 R8C1B R14C17 R11C5 DRIVERS R7C19 R11C13 plc array
    Contextual Info: Microelectronics Preliminary Data Sheet March 1996 Lucent Technologies Bell Labs Innovations Optimized Reconfigurable Cell Array ORCA OR2CxxA Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.35 |xm technol­


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    16-bit 32-bit multiplier using CARRY SELECT adder R12C20 R3C15 RuC15 R8C1B R14C17 R11C5 DRIVERS R7C19 R11C13 plc array PDF

    OR2T15A6S240-DB

    Abstract: OR2C06A OR2C12A OR2T15B OR2T40B OR2C06A3T144I-DB AP99-027FPGA OR2C12A-4S208 OR2C26A4PS208-DB OR2C15A3S208I
    Contextual Info: Data Sheet October 2003 ORCA Series 2 Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, low-power 0.35 m CMOS technology OR2CxxA , 0.3 μm CMOS technology (OR2TxxA), and 0.25 μm CMOS technology


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    16-bit 32-bit DS99-094FPGA DS98-022FPGA) OR2T15A6S240-DB OR2C06A OR2C12A OR2T15B OR2T40B OR2C06A3T144I-DB AP99-027FPGA OR2C12A-4S208 OR2C26A4PS208-DB OR2C15A3S208I PDF