RAM SLOT Search Results

DSP56000

Abstract: DSP56300 DSP56301 DSP56302 AA0484 EL183 msc 1697 Nippon capacitors
Contextual Info: MOTOROLA Order this document by: DSP56302/D SEMICONDUCTOR TECHNICAL DATA DSP56302 Advance Information 24-BIT DIGITAL SIGNAL PROCESSOR 3 Host Interface HI08 ESSI Interface SCI Interface Program RAM 20480 x 24 or X Data Y Data Program RAM RAM RAM 19456 × 24 and

msc 1697

Abstract: DSP56000 DSP56300 DSP56302 DSP56303 d1879 IM 153 y323 Y169 Nippon capacitors
Contextual Info: MOTOROLA Order this document by: DSP56302A/D SEMICONDUCTOR TECHNICAL DATA DSP56302A Advance Information 24-BIT GENERAL PURPOSE DIGITAL SIGNAL PROCESSOR 3 Host Interface HI08 ESSI Interface Program RAM 20480 x 24 or X Data Y Data Program RAM RAM RAM 19456 × 24 and

Contextual Info: HM534253A S eries- Preliminary 262,144-Word x 4-Bit Multiport CMOS Video RAM • DESCRIPTION The HM534253A is a 1-Mbit multiport video RAM equipped with a 256k-word x 4-bit dynamic RAM and a 512-word x 4-bit SAM serial access memory . Its RAM

msc 1697

Abstract: el 198 Response AA0482 mz 1540 switching supply pcr 606 r hasp bb a Nippon capacitors TRANSISTOR MOTOROLA MAC 223 WL 431 DSP56300
Contextual Info: MOTOROLA Order this document by: DSP56302/D SEMICONDUCTOR TECHNICAL DATA DSP56302 Advance Information 24-BIT DIGITAL SIGNAL PROCESSOR 3 SCI Interface Program RAM 20480 x 24 or X Data Y Data Program RAM RAM RAM 19456 × 24 and × × 24 7168 24 7168 Instruction

HM534253AZ-8

Abstract: HM534253AJ-8 HM534253A hitachi TNC HM534253AJ8
Contextual Info: HM534253A S e rie s - Preliminary 262,144-Word x 4-Bit Multiport CMOS Video RAM • DESCRIPTION The HM534253A is a 1-Mbit multiport video RAM equipped with a 256k-word x 4-bit dynamic RAM and a 512-word x 4-bit SAM serial access memory . Its RAM

Contextual Info: HM538121A Series Preliminary 262,144-W ord x 4-Bit M ultiport C M OS V ideo RAM • DESCR IPTIO N HM 538121AJ Series The HM538121A is a 1-Mbit multiport video RAM equipped with a 128k-word x B-bit dynamic RAM and a 256-word x 8-bit SAM serial access memory . Its RAM and

Contextual Info: Freescale Semiconductor Technical Data DSP56301 Rev. 10, 7/2006 DSP56301 24-Bit Digital Signal Processor 52 6 6 3 Memory Expansion Area Triple Timer Host Interface ESSI SCI X Data Program RAM RAM 4096 x 24 bits 2048 × 24 bits Default (Default) Y Data RAM

HP16

Abstract: DSP56000 DSP56300 DSP56301 A2061
Contextual Info: Freescale Semiconductor Technical Data DSP56301 24-Bit Digital Signal Processor 52 6 6 3 Memory Expansion Area Triple Timer Host Interface ESSI SCI X Data Program RAM RAM 4096 x 24 bits 2048 × 24 bits Default (Default) Y Data RAM 2048 × 24 bits (Default)

MFC motorola

Contextual Info: Freescale Semiconductor Technical Data DSP56301 Rev. 10, 7/2006 DSP56301 24-Bit Digital Signal Processor 52 6 6 3 Memory Expansion Area Triple Timer Host Interface ESSI SCI X Data Program RAM RAM 4096 x 24 bits 2048 × 24 bits Default (Default) Y Data RAM

DSP56000

Abstract: DSP56300 DSP56301 PC1197
Contextual Info: Freescale Semiconductor Technical Data DSP56301 Rev. 10, 7/2006 DSP56301 24-Bit Digital Signal Processor 52 6 6 3 Memory Expansion Area Triple Timer Host Interface ESSI SCI X Data Program RAM RAM 4096 x 24 bits 2048 × 24 bits Default (Default) Y Data RAM

ic 8255 pll

Abstract: br-112 hack ADSP-2191M F400 HA16 104A18 PMD 1000
Contextual Info: PRELIMINARY TECHNICAL DATA a DSP Microcomputer ADSP-2191M Preliminary Technical Data ADSP-219X DSP CORE FEATURES 64K Words of On-chip RAM, Configured as 32K Words On-chip 24-bit RAM and 32K Words On-chip 16-bit RAM 6.25 ns Instruction Cycle Time Internal , for up to

DSP56000

Abstract: DSP56300 DSP56301
Contextual Info: Freescale Semiconductor, Inc. Technical Data DSP56301/D Rev. 8, 6/2004 52 6 6 3 Memory Expansion Area Triple Timer Host Interface ESSI X Data Program RAM RAM 4096 x 24 bits 2048 × 24 bits Default (Default) SCI Y Data RAM 2048 × 24 bits (Default) Peripheral

3 phase PWM inverters

Abstract: ADSP-21990
Contextual Info: a Mixed Signal DSP Controller ADSP-21990 KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 8K Words of On-Chip RAM, Configured as 4K Words OnChip 24-Bit Program RAM and 4K Words On-Chip 16-Bit Data RAM External Memory Interface

d1691

Abstract: 1 HP25 lm 555 oscillator PC1197 hp circuit diagram 2.1 to 5.1 home theatre circuit diagram cpcap motorola MF CAPACITOR 165 mf PCR 406 J WL 431
Contextual Info: Technical Data DSP56301/D Rev. 6, 11/2002 24-Bit Digital Signal Processor 52 6 6 3 Memory Expansion Area Triple Timer Host Interface ESSI X Data Program RAM RAM 4096 x 24 bits 2048 × 24 bits Default (Default) SCI Y Data RAM 2048 × 24 bits (Default) Peripheral

hp42

Abstract: CA 2025 DSP56000 DSP56300 DSP56301 K1 module mz 1532 a 2611
Contextual Info: Technical Data DSP56301/D Rev. 5, 1/2002 24-Bit Digital Signal Processor 52 6 6 3 Memory Expansion Area Triple Timer Host Interface ESSI X Data Program RAM RAM 4096 x 24 bits 2048 × 24 bits Default (Default) SCI Y Data RAM 2048 × 24 bits (Default) Peripheral

DSP56000

Abstract: DSP56300 DSP56303 HA10 PB10
Contextual Info: Technical Data DSP56303/D Rev. 7, 1/2002 24-Bit Digital Signal Processor 16 6 6 3 Memory Expansion Area X Data RAM 2048 x 24 bits default PrograM RAM 4096 × 24 bits (default) Peripheral Expansion Area XM_EB SCI YAB XAB PAB DAB Y Data RAM 2048 × 24 bits

ADSP21992

Abstract: ADSP-21992
Contextual Info: a Mixed Signal DSP Controller With CAN ADSP-21992 KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 48K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 16K Words On-Chip 16-Bit Data RAM

ADSP-21990

Contextual Info: a Mixed-Signal DSP Controller ADSP-21990 FEATURES ADSP-2199x, 16-bit, fixed-point DSP core with up to 160 MIPS sustained performance 8K words of on-chip RAM, configured as 4K words on-chip, 24-bit program RAM and 4K words on-chip, 16-bit data RAM External memory interface

WL 431

Abstract: DSP56000 DSP56300 DSP56303 HA10 PB10
Contextual Info: Technical Data DSP56303/D Rev. 7, 1/2002 24-Bit Digital Signal Processor 16 6 6 3 Memory Expansion Area X Data RAM 2048 x 24 bits default PrograM RAM 4096 × 24 bits (default) Peripheral Expansion Area XM_EB SCI YAB XAB PAB DAB Y Data RAM 2048 × 24 bits

1 HP25

Abstract: WL 431 DSP56000 DSP56300 DSP56301 CCD97
Contextual Info: Technical Data DSP56301/D Rev. 7, 2/2004 24-Bit Digital Signal Processor 52 6 6 3 Memory Expansion Area Triple Timer Host Interface ESSI X Data Program RAM RAM 4096 x 24 bits 2048 × 24 bits Default (Default) SCI Y Data RAM 2048 × 24 bits (Default) Peripheral

ADSP21991

Abstract: ADSP-21991 pwm based bidirectional dc motor speed control l2
Contextual Info: a Mixed Signal DSP Controller ADSP-21991 KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 40K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 8K Words On-Chip 16-Bit Data RAM External Memory Interface

Contextual Info: a Mixed Signal DSP Controller ADSP-21991 KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 40K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 8K Words On-Chip 16-Bit Data RAM External Memory Interface

WT4 smd

Abstract: WT24 transistor WT6 automatic room power controller using scr SCHEMATIC circuit scr oscillator transistor WT6 45 sim gsm reader circuit diagram ETU10-8 transistor WT5 52 smart ups 750 circuit
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • • 80C51 Core with 12 or 6 Clocks per Instruction 768 Bytes RAM AT83C5122 with 32 Kbytes ROM AT85C5122 with 32 Kbytes Code RAM AT89C5122 with 32 Kbytes Flash RAM

b1l3

Abstract: Si3225 ProSLIC Q1 25C2 AN58
Contextual Info: AN58 S i 3 2 2 0 / S i 3 2 2 5 P ROGRAMMER ’S G UIDE 1. Si3220/Si3225 RAM & Register Space The Si3220/Si3225 is a highly-programmable telephone linecard solution that uses internal registers and RAM to program operational parameters and modes. The register and RAM space are explained in this