RECJ Search Results

Contextual Info: 10 N O TE: 8.45 L 5 0 0 8 8 7 -1 4 * 9 / 59205-497^ S/T A P P R I C A B L E R E C . NO.; RECJ (H A RN ESS 2. W M ATERIAL 2- l SE Q U EN TIA L / \ o v y ? : 94V-0, i s e HOUSING: G . F . H E A T R E S I S T A N T 9 4 V - 0 , B L A C K COLOR 2-2. 5>— 5 o ^ L : f f l n #

Contextual Info: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _POW ER_ _ _ _BE OCRS no \P J » I B THREE-PHASE I „ N=4 0 -1 2 0 A RECJTIEIER S.A. ROTATING / SILIC O N T C= 8 5°C REC TIFIER

2N3449

Contextual Info: m i l - s -19500/338 üsx7 29 September 19^5 MILITARY SPECIFICATION SS-11 CONDUCTOR DEVICE, TRAiBISTCR, FKP, GEfMANTUM, SWITCHING TVTS 2lT)kk9 i . SÇÇPS 1 . 1 This s?e ci f i îô 1 1 ss ' " e r a the detailed recjuirerienta fcr a Itrw-leTel, fcigh-apeed-avitchicig gsrzaoiua

ANA 608

Abstract: Micronas SDA9588X alternate SDA data sheet for all smd components frv0 fsw spectrum ana SMD CAPACITORS color code SMD CAPACITORS color code table tv Picture-in-Picture Processor
Contextual Info: PRELIMINARY DATA SHEET SDA 9488X PIP IV Basic SDA 9588X OCTOPUS Cost-effective Picture-In-Picture ICs Edition Feb. 28, 2001 6251-561-1PD SDA 9488X Preliminary Data Sheet SDA 9588X Cost effective Picture-In-Picture PIP ICs Version 1.3 CMOS General Description

Contextual Info: ADSP-8110/ADSP-8120 ADSP-7110/ADSP-7120 ANALOG ► DEVICES Floating Point Chip Set November, 1987 IFEATURES • Complete floating point and integer processor chip set supports the ANSI/IEEE STD.754 and DEC F&G formats. ■ Four data formats 64-bit floating point

TSC 78L05

Abstract: cm 78l05 78L05T 78L05 sot-89 ST KI 78L05 78l05 sot 78L05 D
Contextual Info: s TAIWAN SEMICONDUCTOR TS78LÛ0 Series 3-Terminal 10ÛmA Positive Voltage Regulator b RoHS CO M PLIANCE TO -92 Pin D efinition: 1. Output 2. Ground 3. Input SO T-23 3 # 1 Pin D efinition: 1. Output 2. Input 3. Ground SOP-8 Pin Definition; 1. Output 8. 2. Ground

74LS08 pin configuration

Abstract: 74LS08 function table
Contextual Info: GD54/74LS08 QUADRUPLE 2-INPUT POSITIVE AND GATES Description Pin Configuration This device contains four independent 2-input AND gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. Vcc 4B 4A 4'i 3B 3A 3Y 14 13 12 1 10 9 8 i - Function Table each gate

270710

Abstract: CX041A
Contextual Info: ^ 80960CA-33, -25, -16 32-BIT HIGH-PERFORMANCE EMBEDDED PROCESSOR * Two Instructions/Clock Sustained Execution * Four 59 Mbytes/s DMA Channels with Data Chaining * Dem ultiplexed 32-bit Burst Bus with Pipelining • 32-bit Parallel Architecture — Two Instructions/clock Execution

29F52

Abstract: 29F52SC 29F52SPC 29F53 29F53SPC M24B N24C
Contextual Info: j ^ N a t i o n a l S e m i c o n d u c t o 29F52*29F53 ^ r 29F52*29F53 8-Bit Registered Transceiver General Description Features The 29F52 and 29F53 are 8 -bit registered transceivers. Two 8 -bit back to back registers store data flowing in both direc­ tions between two bidirectional buses. Separate clock,

Contextual Info: PD -5.046 International TOR Rectifier CPV362M4F IG BTSIP MODULE Features • • • • Fully isolated printed circuit board mount package Switching-loss rating includes all "tail" losses HEXFRED soft ultrafast diodes Optimized for medium operating 1 to 10 kHz

AD8304-EVAL

Abstract: AD8304 AD83041 HP 3577A AD8304ARU AD8304ARU-REEL AD8304ARU-REEL7 RU-14 SNSD
Contextual Info: a FEATURES Optimized for Fiber Optic Photodiode Interfacing Eight Full Decades of Range Law Conformance 0.1 dB from 1 nA to 1 mA Single-Supply Operation 3.0 V– 5.5 V Complete and Temperature Stable Accurate Laser-Trimmed Scaling: Logarithmic Slope of 10 mV/dB (at VLOG Pin)

XO-31

Abstract: AAD00-AAD04 wtl3164 weitek NS32580-30 NS32081
Contextual Info: PRELIMINARY NS32580-20/NS32580-25/NS32580-30 Floating Point Controller G eneral Description The NS32580 Floating-Point Controller FPC is an interface device designed to couple the NS32532 Microprocessor with the Weitek WTL 3164 Floating-Point Data Path (FPDP).

qx25

Contextual Info: PIC16C9XX 15.0 INSTRUCTION SET SUMMARY Each PIC16CXXX instruction is a 14-bit word divided into an OPCODE which specifies the instruction type and one or more operands which further specify the operation of the instruction. The PIC16CXX instruction set summary in Table 15-2 lists byte-oriented, bit-oriented, and literal and control operations. Table 15-1

Contextual Info: Not Recommended for New Designs CC2430 A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee Applications • • • • • • • • 2.4 GHz IEEE 802.15.4 systems ZigBee® systems Home/building automation Industrial Control and Monitoring

Delta Electronics dps -300HB A

Abstract: Delta Electronics dps -350MB A CC2430 125 kHz RFID tag antenna EM 555 timer as part of a signal jammer data sheet IC 7404 868 MHZ wireless audio transmitter schematic microsoft 2.4GHz transceiver sample program for CC2430 0xDF25
Contextual Info: CC2430 A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee Applications • • • • • • • • 2.4 GHz IEEE 802.15.4 systems ZigBee® systems Home/building automation Industrial Control and Monitoring Low power wireless sensor networks

free of intel 8096 microcontroller

Abstract: 8096 microcontroller block diagram 8096 microcontroller architecture 8051 based light following robot 16 bit 8096 microcontroller architecture 8096 microcontroller architecture application 8096 microcontroller features intel 80188 8051 applications 8096 architecture
Contextual Info: In te l AP-318 APPLICATION NOTE Intel's 87C75PF Port Expander Reduces System Size and Design Time TERRY KENDALL MICROCONTROLLER PERIPHERALS INTEL CORPORATION Or dii r Numbor: 292048 001 in te i1 INTEL'S 87C75PF PORT EXPANDER REDUCES SYSTEM SIZE AND DESIGN TIME

Contextual Info: HA.C /* * * * * * * * HA.C - Copyright c 1992 Echelon Corporation Last revision 5/10/92 Example LONWORKS host application. Uses a LONWORKS standard network driver to communicate with an Echelon Serial LONTALK Adapter (SLTA) or a Microprocessor Interface Program (MIP)-based network interface.

Contextual Info: 53 National Æm Semiconductor 54F/74F191 Up/Down Binary Counter with Preset and Ripple Clock General Description Features The ’F191 is a reversible modulo-16 binary counter featur­ ing synchronous counting and asynchronous presetting. The preset feature allows the ’F191 to be used in program­

1156d

Abstract: M5M44400
Contextual Info: MITSUBISHI LS Is <DRAM MODULE MH1 M32CDJ-5,-6,-7/ MH1 M32CNDJ-5,-6,-7 FAST PAGE MODE 33554432-BIT 1Q48576-WORD BY 32-BIT) DYNAMIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) (Single side] The M H 1M 32C D J/C N D J a 1048576-word by 32-bit dynamic Vss 2 DQo

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M onolithic Dual S w itching Diode BAV170LT1 This switching diode has the following features: Motorola Preferred Device Low Leakage Current Applications Medium Speed Switching Times Available in 8 mm Tape and Reel Use BAV170LT1 to order the 7 inch/3,000 unit reel

Contextual Info: National Semiconductor 54F/74F401 CRC Generator/Checker General Description Features The ’F401 Cycle Redundancy Check CRC Generator/ Checker provides an advanced tool for implementing the most widely used error detection scheme in serial digital data handling systems. A 3-bit control input selects one-ofeight generator polynomials. The list of polynomials in­

M5L2716K

Abstract: 2716K M5L2716K-65 intel 2716
Contextual Info: MITSUBISHI LSIs M5L 2716 K, K-65 1 6 3 8 4 -B IT 2 0 4 8 -W 0 R D BY 8 -B IT ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION PIN CONFIGURATION (TOP VIEW) These are ultraviolet-light erasable and electrically re­ programmable 16 3 8 4 -b it (20 4 8 -w o rd by 8-bit) EPROMs.

R38B16A

Abstract: 1B10 R38B14B S00C pd2162
Contextual Info: 4 8 5 5 4 5 2 INTERNATIONAL R E C T IF IE R |I Q R [ in t e r n a t io n a l 73C 07278 T -O l"^ 3 DataSheet r e c t if ie r INTE RNA TIONAL RECTI FIE R D _ ^ No. PD-2.162 4ASS4S5 D00727B D J~~ R38B SERIES 1800-1200 VOLTS RANGE 1590 AMP AVG HOCKEY PUK DIFFUSED JUNCTION RECTIFIER DIODES

Contextual Info: 410 ß National Semiconductor 54F/74F410 Register Stack— 16 x 4 RAM TRI-STATE Output Register General Description Features The 'F410 is a register-oriented high-speed 64-bit Read/ Write Memory organized as 16-words by 4-bits. An edgetriggered 4-bit output register allows new input data to be