S59520 Search Results

S5982

Contextual Info: WS59820/WS59820B CMOS/BI-DIRECTIONAL BUS INTERFACE REGISTERS KEY FEATURES • Two Banks of 8 x 16 Registers • Contents of Each Register Available at Output • Provides Temporary Address or Data Storage Between Two Processor Ports or Buses • Bi-Directional Buses Interface — Dual

Contextual Info: HSP9520, HSP9521 May 1999 Data Sheet Multilevel Pipeline Registers Features These devices are multilevel pipeline registers implemented using a low power CMOS process. They are pin for pin compatible replacements for industry standard multilevel pipeline registers such as the L29C520 and L29C521. The

Contextual Info: WS59820/WS59820B CMOS/BI-DIRECTIONAL BUS INTERFACE REGISTERS K EY FEATURES • Two Banks of 8 x 16 Registers • Contents of Each Register Available at Output • Provides Temporary Address or Data Storage Between Two Processor Ports or Buses • Bi-Directional Buses Interface — Dual

WS59820

Abstract: WS59820B WS59520S
Contextual Info: WS59820/WS59820B CMOS/BI-DIRECTIONAL BUS INTERFACE REGISTERS KEY FEATURES • Two Banks of 8 x 16 Registers • Contents of Each Register Available at Output • Provides Temporary Address or Data Storage Between Two Processor Ports or Buses • Bi-Directional Buses Interface — Dual

Contextual Info: HA RR IS SEÎ1IC0ND S E C T O R 40E D • 43D2271 0Q32T4Ô HSP9520/H SP9521 *£] H a r r is Multilevel Pipeline Register May 1991 Features ■ HAS D escription ' . . . . _ ■ These devices are multilevel pipeline registers implemented using a low power CMOS process. They are pin forain