SN74AVC08 Search Results
SN74AVC08 Datasheets (3)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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SN74AVC08D |
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QUADRUPLE 2-INPUT POSITIVE-AND GATE | Scan | 247.48KB | 8 | ||
SN74AVC08DGV |
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QUADRUPLE 2-INPUT POSITIVE-AND GATE | Scan | 247.48KB | 8 | ||
SN74AVC08PW |
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QUADRUPLE 2-INPUT POSITIVE-AND GATE | Scan | 247.48KB | 8 |
SN74AVC08 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: SN74AVC08 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCES1 47 - D ECE M B ER 1998 EPIC Enhanced-Performance Implanted CMOS Submicron Process Over-Voltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications DOC™ (Dynamic Output Control) Circuit |
OCR Scan |
SN74AVC08 | |
Contextual Info: SN74AVC08 QUADRUPLE 2-INPUT POSITIVE-AND GATE S C E S 14 7 -D E C E M B E R 1998 EPIC Enhanced-Performance Implanted CMOS Submicron Process Over-Voltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications DOC™ (Dynamic Output Control) Circuit |
OCR Scan |
SN74AVC08 | |
Contextual Info: SN74AVC08 QUADRUPLE 2-INPUT POSITIVE-AND GATE S C E S 1 4 7 A - D E C EM BER 1 9 9 8 - R EVISED MARCH 1999 EPIC Enhanced-Performance Implanted CMOS Submicron Process Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications DOC™ (Dynamic Output Control) Circuit |
OCR Scan |
SN74AVC08 | |
Contextual Info: SN74AVC08 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCES147E – DECEMBER 1998 – REVISED FEBRUARY 2000 D EPIC Enhanced-Performance Implanted D D D Overvoltage-Tolerant Inputs/Outputs Allow CMOS Submicron Process DOC (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, |
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SN74AVC08 SCES147E | |
FT 4013 d dual flip flop
Abstract: FT 4013 D flip flop 74HC octal bidirectional latch 74HCT 4013 DATASHEET 4511 pin configuration SN7432 fairchild CMOS TTL Logic Family Specifications 7805 acv Datasheet of decade counter CD 4017 sn74154
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T flip flop IC
Abstract: pin designation for CD40110B IC 74LS series logic gates 3 input or gate FT 4013 d dual flip flop ic cmos 4011 CD4001* using NAND gates IC CD 4033 pin configuration Quad 2 input nand gate cd 4093 FT 4013 D flip flop 74HCT 4013 DATASHEET
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Contextual Info: Contents Gates 2–2 SN74AVC00 Page Quadruple 2-Input Positive-NAND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3 SN74AVC02 Quadruple 2-Input Positive-NOR Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–13 |
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SN74AVC00 SN74AVC02 SN74AVC04 SN74AVC08 SN74AVC10 SN74AVC32 SN74AVC74 SN74AVC86 SN74AVC125 SN74AVC157 | |
Difference between LS, HC, HCT devices
Abstract: CD4000 SERIES BOOK 74HCT 4013 DATASHEET SCBD002C Quad 2 input nand gate cd 4093 SCHS176 sn 16861 ng CD4029B CD74ACT153 4017 decade counter circuit diagram
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