SOT1205 Search Results

Contextual Info: LF PA K5 6D SOT1205 LFPAK56D; Reel pack, SMD, 7" Q1/T1 Standard product orientation Orderable part number ending, 115 or X Ordering code 12NC ending 115 Rev. 1 — 13 August 2013 Packing information 1. Packing method Printed plano box Barcode label Reel

Contextual Info: LFP AK 56 D PHPT610030NK NPN/NPN high power double bipolar transistor 20 October 2014 Product data sheet 1. General description NPN/NPN high power double bipolar transistor in a SOT1205 LFPAK56D SurfaceMounted Device (SMD) power plastic package. PNP/PNP complement: PHPT610030PK.

LFPAK56D

Abstract: sot1205 E2HD
Contextual Info: Package outline Plastic single ended surface mounted package LFPAK56D ; 8 leads A E E1 A b1 E2 c1 mounting base D H SOT1205 D1 D2 L 1 2 3 4 b (8x) e A1 w c A X C θ Lp detail X 2.5 mm 5 mm scale Dimensions Unit y C A max 1.05 nom min c c1 D(1) D1(1) A1 b

LFPAK56D

Abstract: SOT120
Contextual Info: Reflow soldering footprint Footprint information for reflow soldering of LFPAK56D package SOT1205 5.85 3.81 1.27 0.7 4x 3.2 3.175 3.325 2.0 1.275 0.8 1.875 2.1 1.0 (2x) 2.7 3.85 3.975 0.0625 0.025 0.7 (4x) 1.44 1.27 1.1 (2x) 3.81 solder land solder land plus solder paste

Contextual Info: Package outline Plastic single ended surface mounted package LFPAK56D ; 8 leads A E SOT1205 A b1 c1 L1 mounting base D H D1 D2 L 1 2 3 e b (8x) 4 w X c A E1 E2 A1 C θ Lp detail X 2.5 A max 1.05 nom min mm 5 mm scale Dimensions Unit y C c c1 D(1) D1(1) A1

Contextual Info: LFP AK 56 D PHPT610035NK NPN/NPN high power double bipolar transistor 14 October 2014 Product data sheet 1. General description NPN/NPN high power double bipolar transistor in a SOT1205 LFPAK56D SurfaceMounted Device (SMD) power plastic package. Matched version of PHPT610030NK.

Contextual Info: LFP AK 56 D PHPT610030NPK NPN/PNP high power double bipolar transistor 14 October 2014 Product data sheet 1. General description NPN/PNP high power double bipolar transistor in a SOT1205 LFPAK56D SurfaceMounted Device (SMD) power plastic package. NPN/NPN complement: PHPT610030NK.

MIFARE DESFire

Contextual Info: BUK9K29-100E Dual N-channel TrenchMOS logic level FET 28 August 2012 Product data sheet 1. Product profile 1.1 General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

Contextual Info: LF PA K 56D BUK9K17-60E Dual N-channel 60 V, 17 mΩ logic level MOSFET 19 March 2014 Product data sheet 1. General description Dual logic level N-channel MOSFET in an LFPAK56D Dual Power-SO8 package using TrenchMOS technology. This product has been designed and qualified to AEC Q101

LFPAK56

Contextual Info: BUK7K5R1-30E Dual N-channel TrenchMOS standard level FET 23 July 2012 Product data sheet 1. Product profile 1.1 General description Dual standard level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

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Abstract: PDTB123Y IP4303CX4 dual cc BAW62 3267 tsop6 PCMF2DFN1 BST60 PUMD4 PDTB123E PDTA143
Contextual Info: Discrete Semiconductors Selection Guide 2014 Protection and signal conditioning devices, diodes, bipolar transistors, MOSFETs and thyristors. NXP’s next generation of packaging DFN Discrete Flat No-lead packages – high performance on smallest footprint

96E840

Contextual Info: LF PA K 56D BUK9K6R8-40E Dual N-channel 40 V, 7.2 mΩ logic level MOSFET 5 December 2013 Product data sheet 1. General description Dual logic level N-channel MOSFET in an LFPAK56D Dual Power-SO8 package using TrenchMOS technology. This product has been designed and qualified to AEC Q101

91840E

Abstract: S/91840E
Contextual Info: LF PA K 56D BUK9K18-40E Dual N-channel TrenchMOS logic level FET 23 April 2013 Product data sheet 1. General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

Contextual Info: LF PA K 56D BUK9K52-60E Dual N-channel TrenchMOS logic level FET 23 April 2013 Product data sheet 1. General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

Contextual Info: LF PA K 56D BUK7K35-60E Dual N-channel 60 V, 30 mΩ standard level MOSFET 15 November 2013 Product data sheet 1. General description Dual standard level N-channel MOSFET in an LFPAK56D Dual Power-SO8 package using TrenchMOS technology. This product has been designed and qualified to

Contextual Info: BUK9K45-100E Dual N-channel TrenchMOS logic level FET 23 July 2012 Product data sheet 1. Product profile 1.1 General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

Contextual Info: BUK9K6R2-40E Dual N-channel TrenchMOS logic level FET 19 July 2012 Product data sheet 1. Product profile 1.1 General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

Contextual Info: BUK9K89-100E Dual N-channel TrenchMOS logic level FET 23 July 2012 Product data sheet 1. Product profile 1.1 General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

Contextual Info: LF PA K 56D BUK7K5R6-30E Dual N-channel TrenchMOS standard level FET 23 April 2013 Product data sheet 1. General description Dual standard level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

Contextual Info: LF PA K 56D BUK7K6R8-40E Dual N-channel TrenchMOS standard level FET 19 March 2013 Product data sheet 1. General description Dual standard level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

LFPAK56D

Contextual Info: BUK7K25-40E Dual N-channel TrenchMOS standard level FET 5 September 2012 Product data sheet 1. Product profile 1.1 General description Dual standard level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use

Contextual Info: NXP transistors in LFPAK56 – the true power package for smart efficiency Full power in half the footprint First bipolar transistors in LFPAK/Power-SO8 These high-power bipolar transistors, housed in LFPAK56 Power-SO8 packages, deliver DPAK-like thermal and electrical performance in just half the footprint. Offering reliable,

Contextual Info: LF PA K 56D BUK7K8R7-40E Dual N-channel 40 V, 8.5 mΩ standard level MOSFET 6 November 2013 Product data sheet 1. General description Dual standard level N-channel MOSFET in an LFPAK56D Dual Power-SO8 package using TrenchMOS technology. This product has been designed and qualified to

Contextual Info: BUK9K29-100E Dual N-channel TrenchMOS logic level FET 28 August 2012 Product data sheet 1. Product profile 1.1 General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use