UPA64S Search Results

W48C60

Abstract: J0801 w48c60-422 J0901 MC100LVEL39 MC12430 SME5410MCZ-270 587-pin TMS 3450 TMS 3450 specifications
Contextual Info: SME5410MCZ-270 July 1998 UltraSPARC -IIi CPU Module DATA SHEET 270 MHz CPU, 256 Kbyte E-cache, UPA, 66 MHz PCI DESCRIPTION The UltraSPARC™-IIi CPU module SME5410MCZ-270 is a high performance, SPARC V9-compliant, small form-factor CPU module. It interfaces to the UltraSPARC Port Architecture 64S (UPA64S) interconnect bus,

SME2411BGA-66

Abstract: W48C60
Contextual Info: microsystems November 1998 UltraSPARC -!!/ CPU Module DATA SHEET 333/360 M Hz CPU, 2MB E-cache, UPA64S, 66 M Hz PCI F u n c t io n a l D e s c r ip t io n The UltraSPARC™-IIi CPU Module ^ is a high performance, SPARC V9-compliant, small form-factor proces­

SME2411BGA-66

Abstract: W48C60 SME2411BGA w48c60-422 UPA64S J0801 PCI INC SME5421MCZ-333 SME5421MCZ-360 UltraSPARC-IIi
Contextual Info: 805-5004.frm Page 1 Friday, January 22, 1999 4:42 PM SME5421MCZ-333 SME5421MCZ-360 December 1998 UltraSPARC -IIi CPU Module DATA SHEET 333/360 MHz CPU, 2-MByte E-cache, UPA64S, 66 MHz PCI FUNCTIONAL DESCRIPTION The UltraSPARC™-IIi CPU Module [1] is a high performance, SPARC V9-compliant, small form-factor processor module. It interfaces to the UltraSPARC Port Architecture 64-bit Slave UPA64S interconnect bus, main

DAT46

Contextual Info: Preliminary SME5431 PCI-360 SME5434PCI-440 SME5434PCI-480 m icrosystem s March 1999 UltraSPARC -!!/ CPU Module DATA SHEET 360/440/480M H z CPU; 0.25 to 2 MB L2 cache, UPA64S, 66M Hz PCI D e s c r ip t io n The SME5431PCI and SME5434PCI UltraSPARC™-IIi CPU Modules provide high-performance, SPARC v9

SME2411BGA-66

Abstract: W48C60 SME2411BGA SME1040LGA w48c60-422 J0801 UltraSPARC ii MC100LVEP210 SME5431PCI-360 SPARC v9 architecture BLOCK DIAGRAM
Contextual Info: Preliminary SME5431PCI-360 SME5434PCI-440 SME5434PCI-480 March 1999 UltraSPARC -IIi CPU Module DATA SHEET 360/440/480MHz CPU; 0.25 to 2 MB L2 cache, UPA64S, 66MHz PCI DESCRIPTION The SME5431PCI and SME5434PCI UltraSPARC™-IIi CPU Modules provide high-performance, SPARC v9

805-0086-02

Abstract: J0801 UltraSPARC ii Sun UltraSparc II
Contextual Info: SME5421MCZ-300 microsystems Ju ly 1998 UltraSPARC -ll/CPU Module DATA SHEET 300 M Hz CPU, 0.5 MB E-cache, UPA, 66 M Hz PCI D e s c r ip tio n '11 The UltraSPARC™-Hi CPU m odule is a h igh perform ance, SPARC V9-com pliant, sm all form -factor CPU m odule. It interfaces to the UltraSPARC P ort A rchitecture 64S UPA64S interconnect bus, m ain m em ory, and

SME2411BGA

Abstract: SME2411BGA-66 J0801 SME1040LGA UltraSPARC ii w48c60 UltraSparc IIi
Contextual Info: Preliminary SME5431PCI-360 SME5434PCI-440 September 2001 DATA SHEET UltraSPARC IIi CPU Module 360/440MHz CPU; 0.25 to 2 MB L2 cache; UPA64S, 66MHz PCI Interfaces DESCRIPTION The UltraSPARC™-IIi CPU Modules provide high-performance, SPARC v9 architecture computing on a mezzanine-style configuration consisting of an UltraSPARC-IIi microprocessor, L2 cache SRAMs, and high speed

W48C60

Abstract: w48c60-422 805-0086-02 SME1040 UltraSPARC ii J0801 tba 940 MC100LVEL39 MC12430 SME5421MCZ-300
Contextual Info: SME5421MCZ-300 July 1998 UltraSPARC -IIi CPU Module DATA SHEET 300 MHz CPU, 0.5 MB E-cache, UPA, 66 MHz PCI DESCRIPTION [1] The UltraSPARC™-IIi CPU module is a high performance, SPARC V9-compliant, small form-factor CPU module. It interfaces to the UltraSPARC Port Architecture 64S UPA64S interconnect bus, main memory, and

UltraSPARC-IIIi

Abstract: NVRAM for Sun UltraSparc IIi UltraSPARC-III STP2003QFP 4900 H02 gigabyte MOTHERBOARD CIRCUIT diagram A27 639 SME2411 SME1430LGA-360 SME1430LGA-440
Contextual Info: SME1430LGA-360 SME1430LGA-440 SME1430LGA-480 May 1999 UltraSPARC -IIi CPU DATA SHEET Highly Integrated 64-Bit RISC; L2-Cache, DRAM, PCI Interfaces DESCRIPTION The SME1430LGA CPU UltraSPARC-IIi microprocessor is a highly-integrated, 64-bit, SPARC V9 superscalar

UltraSPARC ii

Abstract: PI-275 UltraSPARC IIIi
Contextual Info: S un M icroelectronics July 1997 FFB DATASHEET High Performance UPA Based 24-bit Frame Buffer D e s c r ip t io n The Fast Frame Buffer FFB is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output

Contextual Info: SME541OMCZ-270 microsystems Ju ly 1998 UltraSPARC -ll/CPU Module DATA SHEET 270 M Hz CPU, 256 Kbyte E-cache, UPA, 66 M Hz PCI D e s c r ip t io n The UltraSPARC™ -IIi CPU m odule SME5410MCZ-270 is a high perform ance, SPARC™ V 9-com pliant, sm all

BY575

Abstract: 28BZ 8 PINS J-354W display 16119
Contextual Info: 501-4126 3D 501-4127 (2D) July 1997 FFB DATA SHEET High Performance UPA Based 24-bit Frame Buffer DESCRIPTION The Fast Frame Buffer (FFB) is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output

sme2411

Contextual Info: Preliminary SME2411 July 1997 UltraSPARC -IIi APB DATA SHEET Advanced PCI Bridge, 66-MHz-Primary-to-33-MHz-Secondary FUNCTIONAL DESCRIPTION The Advanced PCI Bridge APBTM , SME2411, is a PCI-to-PCI bridge chip that is compatible with version 2.1 of the PCI Local Bus Specification [1]. The APB features a connection path between a 32-bit bus running at speeds

SPARC v9 architecture BLOCK DIAGRAM

Abstract: UltraSPARC ii sparc sparc v7 STP1031LGA Sinak h30
Contextual Info: STP1031 July 1997 UltraSPARC -II DATA SHEET Second Generation SPARC v9 64-Bit Microprocessor With VIS DESCRIPTION The STP1031, UltraSPARC–II, is a high-performance, highly-integrated superscalar processor implementing the SPARC-V9 64-bit RISC architecture. The STP1031 is capable of sustaining the execution of up to four

upa64

Abstract: UPA128 STP221
Contextual Info: S un M icroelectronics July 1997 u se Uniprocessor System Controller DATA SHEET D e s c r ip t io n The Uniprocessor System Controller USC has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients.

PSA B20 0110

Abstract: Sun UltraSparc T1 UltraSPARC ii ultrasparc
Contextual Info: S un M icro electro nics Ju ly 1997 U ltr a S P A R C DATA SHEET -!! Second Generation SPARC v9 64-Bit Microprocessor With VIS D e s c r ip t io n The STP1031, U ltraSPA R C -II, is a high-perform ance, highly-integrated superscalar processor im plem enting

Sun UltraSparc T1

Abstract: ULTRASPARC-III UPA64 ultrasparc 3 ULTRASPARC Sun UltraSparc UltraSparc IIi
Contextual Info: U l t r a S P A R C i - S e r i e s Integrated 270/300/333 MHz 64-bit RISC Single Chip Solution The UltraSPARC i-Series family consists of processors at 270, 300, and 333MHz and modules at 270MHz/256Kb, 300MHz/512Kb, and 333MHz/2MB. This innovative processor was designed to deliver proven system

dps 298 cp 2

Abstract: 286 dram schematic 85A9 k2 dsc hen ng dps 298 cp UltraSPARC ii FRS 8C - 05 9V DC
Contextual Info: if 4 4 o Q O o < o o f O O O I O o o o < I O O O O ( 5 o ò o ° 5 ‘ o o < o Dual Processor System Controller (DSC) Prelim in ary Data Sheet O c to b e r 1 996 S T P 220 2B G A S un M icroelectronics October 1996 U lt r a S P A R C DATA SHEET - I/II

XCM 06

Abstract: UltraSPARC ii STP2220BGA
Contextual Info: S un M i c r o e l e c t r o n i c » lis e Uniprocessor System Controller Data Sheet Decem ber 1996 STP2200BG A Sun microsystems S TP 2 2 0 0 B G A S un M ic r o elec tr o n ic s December 1996 use Uniprocessor System Controller DATA SHEET D esc r ip tio n

schematic diagram apc UPS

Abstract: ICS633 schematic diagram UPS APC IC-S573 AT12L UPA audio analyzer AT12N apc ups schematic STP2002
Contextual Info: S un M icro electro nics July 1997 _DSC D A TA SH E E T D ual Processor System Controller D e s c r ip t io n The STP2202BGA is the Dual Processor System Controller, also referred to as DSC, used in a low-cost high-performing two-processor system. DSC's primary functions are to provide data coherence control,

48c60

Abstract: CZ-333
Contextual Info: SME5421MCZ-333 June 1998 m icrosystem s UltraSPARC-ll/ CPU Module DATA SHEET 333 MHz CPU, 2MB E-cache, UPA, 66 MHz PCI F u n c t io n a l D e s c r ip t io n [1] The UltraSPARC-IIi CPU M odule is a high perform ance, SPARC V9-com pliant, small form -factor processor

cmd1011

Abstract: STP2024QFP sun sparc pinout
Contextual Info: STP2202ABGA June 1998 DSC DATA SHEET Dual Processor System Controller DESCRIPTION The STP2202BGA is the Dual Processor System Controller, also referred to as DSC, used in a low-cost high-performing two-processor system. DSC’s primary functions are to provide data coherence control,

Contextual Info: Prelim in ary SME1040 S un M ic r o e l e c t r o n ic s Ju ly 1997 UltraSPARC -lli DATA SHEET Highly Integrated 64-Bit RISC Processor, PCI Interface F u n c t io n a l D e s c r ip t io n U ltra S P A R C -II¿ SM E1040 is a highly-integrated 64-bit SP A R C V9 superscalar processor. A n optional A P B ™

STP2003QFP

Abstract: EDO FLASH DIMMs 72 pin CONNECTOR HEADER 20 PIN MAIL Sun Ultra 5 DB25P DB25S M48T59 Sun Ultra AX simm72 SIMM 72
Contextual Info: SEUAX SEUAXE July 1997 SPARCengine Ultra™AX DATA SHEET Ultra AX Net Engine DESCRIPTION The Ultra AX Net Engine combines the Sun UltraSPARC microprocessor, network software and PC hardware components to provide for a broad range of Internet and intranet server applications. The Ultra AX Net