STR 5V 3A Search Results

AMD Athlon 64 X2 5000

Abstract: MPT N095 40-A05100-D000 D5036 D552 IC digital clock lcd inverter for notebook CS3711 aA88 U505D ad07 mainboard
Contextual Info: A B C D E POWER PLANE LISTING : PWR +3.3V +5V +12V KBVCC NOM +2.5V +3.3VS +5VS ON ON ON ON ON ON ON ON ON ON ON ON POS ON ON ON ON ON ON ON ON ON ON ON ON 2.5V/VCCA_PLL STR ON OFF OFF OFF OFF ON ON ON ON ON OFF ON Thermal sensor OFF OFF OFF OFF OFF OFF OFF

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR5517 LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR „ DESCRIPTION The UR5517 is a linear regulator which provides up to 3 Amp bi-directional sourcing and sinking capability for DDR1/2/3 SDRAM bus terminator applications. It only requires 20uF of ceramic output

UR5517

Abstract: MSOP-10 s3h-i
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR5517 Preliminary LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR „ DESCRIPTION The UR5517 is a linear regulator which provides up to 3 Amp bi-directional sourcing and sinking capability for DDR1/2/3 SDRAM bus terminator applications. It only requires 20uF of ceramic output

s3hi

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR5517 LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR „ DESCRIPTION The UR5517 is a linear regulator which provides up to 3 Amp bi-directional sourcing and sinking capability for DDR1/2/3 SDRAM bus terminator applications. It only requires 20uF of ceramic output

mc3487

Abstract: D2578 D2678
Contextual Info: MC3487 QUAD DIFFERENTIAL LINE DRIVER WITH 3-STATE OUTPUTS SLLS098 - D2578, MAY 1980 - REVISED SEPTEMBER 1986 Meets EIA Standard RS-422-A and Federal Standard 1020 D, J, OR N PACKAGE TOP VIEW 3-State, TTL-Compatible Outputs 1A [ 1Y[ Fast Transition Times

42568

Abstract: ST 42568 C4256 A1725 42568 wp TMS4256 C4257 k a1725 THCT4502 NCP1520
Contextual Info: TEXAS 0D7tôôl IN STR , 3 T 5SE Single 5-V Power Supply — 5 % Tolerance Required for TM S4256-8 — 10% Tolerance Required for TM S4256-10, -12, -15, and TM S4257-10, -12, -15 A8[ 'D [ w [ RAS E A0[ A2[ A1[ JE D E C Standardized Pinouts Performance Ranges:

BUX83

Abstract: BUX82 gg3b
Contextual Info: TEX AS INSTR {OPTO} “§ 9 6 1 7 2 6 TEXAS b2 IN STR » riflT h lT E b 62C O P T O QG3bbb3 36663 B IIY Q 3 RI IY Q Q N-P-N SILICON POWER TRANSISTORS O CTO BE R 1 9 8 2 - R EVISED O C T O B E R 198 4 60 W at 5 0 ° C C ase Temperature 6 A Continuous Collector Current

core i5 MOTHERBOARD CIRCUIT diagram

Abstract: t101a 243332 STR application PIIX4E dram intel pentium 4 motherboard schematic diagram 443BX 82371AB 82371EB 82443BX
Contextual Info: Intel Pentium® II Processor – Low-Power Module Design Guide Application Note February 2000 Order Number: 273212-003 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual

BAV99-SOT23

Abstract: mitac mitac 6120 str 5V 3A rls4148
Contextual Info: 1 2 3 4 5 6 7 8 VMAIN F5 pull high at d/d bd 1 2 FUSE_1206 1A-1206 VDD5 R170 0603 VDD5SW C280 10U 1206 10V LP2951-02BM 2 1 R160 47K 0603 GND R181 100K 0603B R193 Q20 NDS352P S D VDD5S 100K 0603B PME# 18 ADEN# 18,22 18,22 3 STR# RLS4148 MLL34B JP_NET JP_NET15

Contextual Info: SN54ALVTH16240, SN74ALVTH16240 2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCES138A - JULY 1998 - REVISED JANUARY 1999 • State-of-the-Art Advanced BiCMOS Technology ABT Widebus Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation

a7710

Abstract: intel 915 motherboard circuit diagram intel 915 motherboard schematic RSMRST 443BX 82371AB 82371EB 82443BX free circuit diagram of intel 915 motherboard a7713
Contextual Info: Intel Pentium® III Processor – Low-Power Module Design Guide Application Note April 2000 Order Number: 273319-002 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual

Contextual Info: Technologies GmbH & Co KG Closed Loop Hall Current Sensor CYHCS-DS3 This Hall Effect current sensor is based on closed loop compensating principle and can be used for measurement of DC and AC current, pulse currents etc. The output of the transducer reflects the

G2992F1U

Abstract: circuit diagram of ddr ram G2992 2N7002 SSTL-18 v5856 jedec MS-012-AA
Contextual Info: G2992 Global Mixed-mode Technology Inc. 3A DDR Bus Termination Regulator Features General Description „ The G2992 is a linear regulator designed to meet the JEDEC SSTL-18, SSTL-2 and SSTL-3 Series Stub Termination Logic specifications for termination of

str 0765

Abstract: circuit diagram of ddr ram UR6515DG-SH2-R QW-R101-029
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR6515D LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR „ DESCRIPTION The UR6515D is a linear regulator sourcing or sinking continuous 2A or up to 3A transient peak current while regulating an output voltage to within 40mV in the DDR SDRAM bus terminator

Contextual Info: SN75151, SN75153 QUAD DIFFERENTIAL LINE DRIVERS WITH 3-STATE OUTPUTS SLLS082A- D2453, DECEMBER 1978 - REVISED FEBRUARY 1993 SN75151 DW OR N PACKAGE TOP VIEW * Meets EIA Standard RS-422-A * High-lmpedance Output State for Party-Line Operation * High Output Impedance in Power-Off

SN72710L

Abstract: MC1013P MC680P 796HC mc1235l MC838P MC814G MC1670L 723HC 741hm
Contextual Info: 27-18 LH 0002 C LH 0002 CN 586-81! .587-270 AMPEX CURRENT A M PLIFIE R IN PUT 27-18 AMPEX REV 111 NH 0005C 586-495 D AC08CZ 587-896 27 + R ef | 1_ O PE R ATIO N AL A M PLIFIE R 8 BIT D -A CONVERTER 2" 14 13 12 11 6 5 4 1I i i i i i 3 1 13 , +12V So-4

Contextual Info: Advanced Power Electronics Corp. AP1270 3A SINK/SOURCE BUS TERMINATION REGULATOR DESCRIPTIOON FEATURES Ideal for DDR-I, DDR-II and DDR-III V TT Applications Sink and Source 3A Continuous Current Integrated Power MOSFETs Generates Termination Voltage for SSTL_2, SSTL_18,

AP-127

Contextual Info: Advanced Power Electronics Corp. AP1270 3A SINK/SOURCE BUS TERMINATION REGULATOR DESCRIPTIOON FEATURES Ideal for DDR-I, DDR-II and DDR-III V TT Applications Sink and Source 3A Continuous Current Integrated Power MOSFETs Generates Termination Voltage for SSTL_2, SSTL_18,

Contextual Info: Technologies GmbH & Co KG Closed Loop Hall Current Sensor CYHCS-B100 This Hall Effect current sensor is based on closed loop compensating principle and can be used for measurement of DC and AC current, pulse currents etc. The output of the transducer reflects the

lh4a

Contextual Info: 74ACT11157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS180 - D3908, SEPTEMBER 1991 - REVISED APRIL 1993 ' Inputs Are TTL-Voltage Compatible DW OR N PACKAGE TOP VIEW * Flow-Through Architecture Optimizes PCB Layout a /b [ 1 1Y[ 2 2Y [ 3 g n d [ 4

TO252-5

Abstract: TO263-5
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR6515A LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR „ DESCRIPTION The UR6515A is a linear regulator providing up to 3A transient peak current sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output

br1941

Abstract: COM5016 COMB116 COM8136 WD1943 trobo 7403 ITT
Contextual Info: WD1943 8136 Dual Baud Rate C lo ck FEATURES • SELEC TA B LE BAUD RATE C LO CK FREQ U EN CIES • O PERATES W ITH CRYSTA L O SCILLATO R OR EX­ TERN ALLY G EN ERATED FREQ UEN CY INPUT • ROM M ASKABLE FO R NON-STANDARD FREQ UEN CY SELEC TIO N S • IN TER FA C ES EA SILY W ITH MICROCOM PUTERS

FA-T-RS40

Abstract: MMF-06D24DS S-N10 Magnetic Contactor FR-S520-0.1K to 3.7K inverter FR-BSF01 FR-S520-1.5K mitsubishi s-n10 FR-S520S-1 pdf of three phase induction type wattmeter EARTH LEAKAGE RELAY mitsubishi
Contextual Info: T R A N S IS T O R IZ E D IN V E R T E R F R - S 5 0 0 IN S T R U C T IO N M A N U A L D e ta ile d F R - S 5 0 0 T R A N S IS T O R IZ E D IN V E R T E R IB (N A )-0 6 0 0 0 2 7 -A (0 0 0 3 )M E E P r in te d in J a p a n 1 0 0 -8 3 1 0 S p e c if ic a tio n s s u b je c t to

Contextual Info: UNISONICTECHNOLOGIESCO., LTD UR6515A LINEAR INTEGRATED CIRCUIT 3 A DDR BU S T ERM I N AT I ON REGU LAT OR ̈ DESCRI PT I ON The UR6515A is a linear regulator providing up to 3A transient peak current sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output