UR6515D Search Results

str 0765

Abstract: circuit diagram of ddr ram UR6515DG-SH2-R QW-R101-029
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR6515D LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR „ DESCRIPTION The UR6515D is a linear regulator sourcing or sinking continuous 2A or up to 3A transient peak current while regulating an output voltage to within 40mV in the DDR SDRAM bus terminator

Contextual Info: UNISONICTECHNOLOGIESCO., LTD UR6515D LINEAR INTEGRATED CIRCUIT 3 A DDR BU S T ERM I N AT I ON REGU LAT OR ̈ DESCRI PT I ON The UR6515D is a linear regulator sourcing or sinking continuous 2A or up to 3A transient peak current while regulating an output voltage to within 40mV in the DDR SDRAM bus terminator