SUBTRACTOR IC Search Results

subtractor

Abstract: 8 bit subtractor AT40K AT40KAL AT94K
Contextual Info: IP Core Generator: Subtractor Features • Subtractor – Carry Select • Subtractor – Ripple Carry • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for • • • • FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices

Contextual Info: Signetics FAST 74F385 Adder/Subtractor FAST Products Quad Serial Adder/Subtractor Product Specification FEATURES • Four Independent adder/subtrac­ tors • Two's complement arithmetic • Synchronous operation • Common Clear and Clock • One's complement or magnitude

SUBTRACTOR IC

Contextual Info: Philips Semlconductors-Signetlc* Document No. 853-0868 E C N No. 97678 Date of issue September 20,19 8 9 Status Product Specification FAST 74F385 Adder/Subtractor Quad Serial Adder/Subtractor F A S T Products T YPE FEATURES 74F385 • Four independent adder/subtrac­

Contextual Info: Philips Semlconductors-Slgnetlcs Document No. 853-0868 ECN No. 97678 Date of issue September 20,1989 Status Product Specification FAST 74F385 Adder/Subtractor Quad Serial Adder/Subtractor FAST Products 74F385 • Four Independent adder/subtrac­ tors • Two's complement arithmetic

Contextual Info: LO 00 CO National Semiconductor 54F/74F385 Quad Serial Adder/Subtractor General Description Features The ’F385 contains four serial adder/subtractors with com­ mon clock and clear inputs, but independent operand and mode select inputs. Each adder/subtractor contains a sum

Contextual Info: M OTOROLA L SUFFIX DUAL 2-BIT ADDER/SUBTRACTOR CERAMIC PACKAGE CASE 620 The MC10H180 is a high-speed, lo w -po w e r, general-purpose adder/subtractor. It is designed to be used in special purpose a dders/subtractors o r in high-speed m u ltip lie r arrays.

10180F

Abstract: 10180N ecl 10K signetics ECL ADDER
Contextual Info: Signetics I 10180 I Adder/Subtractor • H ECL Products DESCRIPTION The 10180 is a high-speed, low power, general purpose adder/subtractor. In­ puts for each adder are: Carry-in C0jn, C 1in , Operand A (Ao, A ,), Operand B (Bo, B ,). Outputs are Sum (F0, F ,), Sum

ic for half subtractor

Contextual Info: MOTOROLA Military 10580 Dual 2-Bit Adder/Subtractor ELECTRICALLY TESTED PER: MPG 10580 The 10580 is a high speed, low power general-purpose adder/subtractor. It is designed to be used in special purpose adders/subtractors or in high speed multi­ plier arrays. The 10580 can be used in any piece of equipment where these oper­

Contextual Info: 784 54F/74F784 Connection Diagrams 8-Bit Serial-Parallel M ultiplier With Adder/Subtractor - Bn-1 [7 13 vcc pi u m y xsGE m *4 Description x2 [7 m The ’F784 is a serial nx8 -bit m ultiplier with a final stage adder/subtractor for optional use in adding a B bit to obtain S ± B. A (Bn.-|)-bit can also be

Twos Complement Adder/Subtractor

Abstract: full subtractor
Contextual Info: 784 54F/74F784 Connection Diagrams 8-Bit Serial-Parallel M ultiplier W ith A dder/Subtractor —' Bn-1 [7 PL ID vcc U ÏÜ Y 3 Œ m X4 Description X2 [I The ’F784 is a serial nx8 -bit m u ltip lie r w ith a final stage adder/subtractor fo r optional use in adding a B bit to obtain S ± B. A (Bn.i)-bit can also be

SUBTRACTOR IC

Contextual Info: Am25LS15 A m 2 5 LS 15 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • Four independent adder/subtractors Use with two's complement arithmetic • • Magnitude only addition/subtraction Second sourced by T.l. as Am54LS/74LS3S5 GENERAL DESCRIPTION

Contextual Info: Am25LS15 Am25LS15 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • Magnitude only addition/subtraction Second sourced by T.l. as Am54LS/74LS385 Four independent adder/subtractors Use with two's complement arithmetic GENERAL DESCRIPTION The Am25LS15 is a serial two's complement adder/

"serial adder"

Abstract: 74F385 adder-subtractor design N74F385D N74F385N SF0093
Contextual Info: Philips Semiconductors Product specification Quad serial adder/subtractor 74F385 FEATURES PIN CONFIGURATION • Four independent adders/subtractors • Two’s complement arithmetic • Synchronous operation • Common Clear and Clock • 74F385 is designed for use with serial multipliers in implementing

SUBTRACTOR IC

Contextual Info: £3 National Semiconductor 54F/74F784 8-Bit Serial/Parallel Multiplier with Adder/Subtractor General Description The 'F784 is an 8-bit by 1-bit sequential logic element that multiplies two numbers represented in twos complement notation. The device implements Booth’s algorithm internal­

bj 950 131- 6

Abstract: 74LS385 Am2SLS14 Am25LS14 Am25LS15 25LS22
Contextual Info: m 2 5 L S 1 Am25LS15 A 5 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • Magnitude only addition/subtraction Second sourced by T.l. as Am 54LS /74LS385 Four independent adder/subtractors Use w ith tw o 's com plem ent arithm etic GENERAL DESCRIPTION

4 bit serial subtractor

Abstract: logic diagram to setup adder and subtractor using 74F10 F384 F385
Contextual Info: 00 EH National MjM Semiconductor 54F/74F784 8-Bit Serial/Parallel Multiplier with Adder/Subtractor General Description The ’F784 is an 8-bit by 1-bit sequential logic element that multiplies two numbers represented in twos complement notation. The device implements Booth’s algorithm internal­

Contextual Info: AMI S2811 A M ERICAN M ICR O SY ST EM S, INC. SIGNAL PROCESSING PERIPHERAL General Description Features The S2811 Sign al Processing Peripheral S P P is a high speed special purpose arithm etic processor w ith on-chip R O M , R A M , m ultiplier, adder/subtractor, accum ulator

circuit diagram of full subtractor circuit

Abstract: circuit diagram of full subtractor circuit using full subtractor pin configuration subtractor ic for instrumentation amplifier using three op amp AD629 high power fet amplifier schematic simple applications of full subtractor
Contextual Info: Chapter II INSIDE AN INSTRUMENTATION AMPLIFIER A Simple Op Amp Subtractor Provides an In-Amp Function Furthermore, this circuit requires a very close ratio match between resistor pairs R1/R2 and R3/R4; otherwise, the gain from each input would be different­—directly affecting common-mode rejection. For example, at a gain of

Contextual Info: ZW Ä N a t io n a l é H à S e m ic o n d u c t o r 54F/74F385 Quad Serial Adder/Subtractor General Description Features The 'F 3 8 5 co ntains fo u r serial a d d e r/su b tra cto rs w ith com ­ mon clo ck and clea r inputs, but independent operand and

high speed multiplier

Abstract: subtractor 8 bit carry select adder adder-subtractor design circuit diagram of inverting adder F10180 ecl adder
Contextual Info: / F10180 • F 10580 / F10K VOLTAGE COMPENSATED ECL DUAL 2-BIT ADDER/SUBTRACTOR DESCRIPTION — The F10180/F10580 are high-speed, low-power Dual 2-Bit Adder/ Subtractors. It is designed to be used in special purpose adder/subtractors or in high speed multiplier arrays. Inputs for each adder are Carry-in, Operand A, and Operand B;

Contextual Info: 385 54F/74F385 Connection Diagrams Quad Serial Adder/Subtractor c p [T l° | v c c S ,H IDF« ms. B i Gl H Iß « A lU Te] a < Fi Œ Description The 'F385 contains four serial adder/subtractors with common clock and clear inputs, but independent operand and mode select inputs. Each

"serial adder"

Abstract: serial adder 25LS14 subtractor 25LS15 adder-subtractor design Fourier transform adder subtractor
Contextual Info: I Quad Serial Adder/Subtractor 25LS15 FEA TU R ES • Four Independent Adder/Subtractors ■ Use w ith Tw o's C om plem ent A rith m etic ■ M agnitude O n ly A ddition /S ubtraction ■ ■ Advanced Low-Pow er S chottky Processing 100% R eliability Assurance Testing in Com pliance W ith

Fast Fourier T

Abstract: adder ic serial adder adder subtractor
Contextual Info: Quad Serial Adder/Subtractor 25LS15 FEA TU R ES. • Fo u r Independent Adder/Subtractors ■ Use w ith Tw o's Com plem ent A rithm etic ■ M agnitude O n ly A d dition /Su btraction ■ Advanced Low -Pow er Sch o ttk y Processing ■ 100% R eliab ility Assurance Testing in Com p lian ce With

85x Resistor

Abstract: resistor 85x adder ic
Contextual Info: HD10180 Dual 2 - bit Adders/Subtractors The H D 1 0 1 8 0 is a high speed, low power, general- are Sum , Sum, and C arry-ou t. The com m on Select purpose adder/subtractor. Inputs fo r each adder inputs serve as a control line to invert A fo r are C arry-in, operand A , and operand B; outputs