T78 RELAY Search Results

T55 transformer

Abstract: AMD 7990 mau aui ML2653 AM7990 DP8390 ML2652 ML2652CQ MPC850 transistor h44
Contextual Info: July 2000 ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface

T55 transformer

Abstract: LTP Cable 10BASE-TMAU
Contextual Info: December 1998 ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface

Contextual Info: April 1997 Micro Linear ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface

T78 relay

Abstract: t428 diode t428 thyristor handbook power triac circuit handbook
Contextual Info: Philips Semiconductors Power Thyristors and Triacs Thyristor and Triac Ratings Ratings and Characteristics dlT/dt A rating is a value that establishes either a limiting capability or a limiting condition for an electronic device. It is determined for specified values of environment and

xxnx

Abstract: JRC 5002 yamaha 68000
Contextual Info: YAMAHA'L S I YM7405B IDNDCH ISDN basic access interface with D channel packet • GENERAL DESCRIPTION The YM7405B is an upgraded version of the YM7405 chip with the ISDN user-network interface function digital four-wire time-division full-duplex operation .

8 PIN DPDT RELAY 24V dc omron

Abstract: omron 24V 30A SPDT RELAY T78 relay 220V coil 30A SPDT RELAY omron 24V 30A RELAY ac 220v dc 28V -8a 24V 30A SPDT RELAY FUJITSU RELAY 100V relay spdt 230v 2a RELAY PCB DPDT 12V
Contextual Info: Electromechanical relays & contactors miniature relays industrial relays automotive relays interface relays definite purpose contactors www.durakoolrelays.com 2 Established in 1935 to manufacture switching devices for power generation Durakool is a renowned manufacturer of switching and sensing components

Contextual Info: D ecem b e r i 998 ^ÉL M icro Linear ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES TheM L 2652, 10BASE-T P h y sic a l Interface C hip, i s a com p te te p h y sic a l interface ibrtw isted p a i r an d AU I E th e m e ta p p lic a tio n s . Itcom b in e s a 10BASE-T M AU ,

0X00

Abstract: CRC-10 GR-499-CORE XRT72L71 XRT72L71IQ XRT7300 XRT73L00
Contextual Info: áç XRT72L71 PRELIMINARY DS3 ATM UNI/CLEAR CHANNEL FRAMER DECEMBER 2000 REV. P1.0.5 GENERAL DESCRIPTION The XRT72L71 DS3 ATM User Network Interface UNI /Clear-Channel Framer is designed to function as either a DS3 ATM UNI or Clear channel framer. For ATM UNI applications, this device provides the

atm receiver multi-bit error header

Abstract: t6634 atm header-error-check multiple bit SEM t11 0X00 CRC-10 GR-499-CORE XRT72L71 XRT72L71IQ XRT7300
Contextual Info: áç XRT72L71 DS3 ATM UNI/CLEAR CHANNEL FRAMER AUGUST 2002 REV. 1.1.0 GENERAL DESCRIPTION The XRT72L71 DS3 ATM User Network Interface UNI /Clear-Channel Framer is designed to function as either a DS3 ATM UNI or Clear channel framer. For ATM UNI applications, this device provides the

LED IR for Tx, RX pair

Abstract: m12653 APPLICATIONS OF 41 LED BLINKER CIRCUIT
Contextual Info: Aprii 1997 % M i c r a L in e a r ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652,10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU,

Contextual Info: M ay 1992 PRELIM IN ARY Micro Linear ML2652 10Base-T Physical Interface Chip GEN ERAL DESCRIPTION FEATURES The M L2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and A U I Ethernet applications. It combines a 10BASE-T M AU ,

AA23

Abstract: CRC-10 GR-499-CORE XRT72L74IQ XRT73L04 2X54 ami c21
Contextual Info: áç XRT72L74 PRELIMINARY FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER DECEMBER 2000 REV. P1.0.0 GENERAL DESCRIPTION The XRT72L74 Four Channel DS3 ATM User Network Interface UNI /Clear Channel Framer is designed to function as either a DS3 ATM UNI or Clear

AA23

Abstract: CRC-10 GR-499-CORE XRT72L73IB XRT73L03 XRT73L04 prbs pattern generator
Contextual Info: áç XRT72L73 PRELIMINARY THREE CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER IC DECEMBER 2000 REV. P1.0.1 GENERAL DESCRIPTION The XRT72L73 Three Channel DS3 ATM User Network Interface UNI /Clear Channel Framer is designed to function as either a DS3 ATM UNI or Clear

TX151n

Abstract: H441 L-265 P8390 IC K140
Contextual Info: Aprii 1997 % M i c r o L in e a r ML2652/ML2653 10Base-T Physical Interface Chip GEN ERAL D ESCRIPTION FEATURES The M L2 6 5 2 , 10BASE-T Physical Interface C hip , is a com plete physical interface for twisted pair and AUI Ethernet applications. It com bines a 10BASE-T M A U ,

virtual-circuit

Contextual Info: BACK SARA Chipset Technical Manual TranSwitch Corporation 8 Progress Drive Shelton, CT 06484 Tel: 203 929-8810 Fax: (203) 926-9453 E-Mail: mktg@txc.com Web: http://www.transwitch.com SARA-S/R Part Numbers: TXC-05501/05601 TranSwitch Corporation Document Number: TXC-95000-TM

Contextual Info: áç XRT83SL38 PRELIMINARY OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR MARCH 2002 REV. P1.0.3 GENERAL DESCRIPTION The XRT83SL38 is a fully integrated Octal eight channels short-haul line interface unit for T1(1.544Mbps) 100Ω, E1(2.048Mbps) 75Ω or 120Ω

Contextual Info: áç XRT83SL34 PRELIMINARY QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR MARCH 2002 REV. P1.0.2 GENERAL DESCRIPTION The XRT83SL34 is a fully integrated Quad four channels short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or 120Ω and J1 110Ω applications.

8051 Read Write for 80c188

Abstract: 68HC11 80C188 I960 TS16 XRT84V24 XRT84V24IV-208 E1 frame FSRC
Contextual Info: áç XRT84V24 PRELIMINARY QUAD E1 FRAMER IC JUNE 2001 REV. P1.0.4 GENERAL DESCRIPTION • Contains two 96 byte Transmit HDLC Buffers and two 96 byte Receive HDLC buffers for each channel The XRT84V24 Quad E1 Framer contains four independent E1 Framer blocks. Each E1 Framer block

EPSON DX5

Abstract: uPD765 CARD-586 diagram of epson tx 121 printer dx5 epson SEK6669P01 CARD-486D4 CARD-486 060H-06FH 74LS612
Contextual Info: MF1023-03 CARD-586 Hardware Manual 本資料のご使用につきましては次の点にご留意願います。 １．本資料の内容については、予告なく変更することがあります。 ２．本資料の一部、または全部を弊社に無断で転載、または、複製など他の目的に使用することは堅

Contextual Info:  XRT72L71 PRELIMINARY DS3 ATM UNI/CLEAR CHANNEL FRAMER IC APRIL 2000 REV. P1.0.2 GENERAL DESCRIPTION The XRT72L71 DS3 ATM User Network Interface UNI /Clear-Channel Framer device is designed to function as either a DS3 ATM UNI or Clear channel framer IC. For ATM UNI applications, this device provides the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers)

philco transistors

Abstract: DS503 2N408 DELCO Radio transistor philco westinghouse transistors 163-H72 westinghouse transistors D3052 2T862 westinghouse DIODES
Contextual Info: SEMICONDUCTOR COMPLEMENT MANUAL TABLE OF CONTENTS Transistors — Home Equipment Page S Transistors — Auto Radios Page 28 Semiconductor Diodes — Home Equipment Page 25 Silicon Rectifiers Page 60 Mechanical Specifications and Connections Page 62 S Y L V A N IA ELEC TR IC P R O D U C T S INC.

33c93

Abstract: WD33C93B cob12 44-PIN western digital hard disk drive diagram
Contextual Info: ' í ’. ^ * 7 V - 'ii* -; / 5ME D IdESTERN D I G I T A L CORP =1710220 0 0 1 5 34 0 ai2 HlilDC WD33C93B Enhanced SCSI Bus Interface Controller " * * ' -’ <1 '•* K *- * ■. . * • ■> ' -* * ' ■V 'J '-J i,:/ ,- - :- .* / i • - 3 ' - * *■' ,

T7230

Contextual Info: Preliminary Data Sheet March 1992 / s AT&T - Microelectronics T7230 Primary Access Framer/Controller PAC Features • Framing formats: — DS1 (1.544 M bits/s): ESF; D4; SZ.C -96; DDS; DDS with FDL access — Programmable independent transm it and receive framing mode when using the ESF

Contextual Info: SCV64 User Manual http://www.silicon360.com The information in this document is subject to change without notice and should not be construed as a commitment by Silicon360. While reasonable precautions have been taken, Silicon360 assumes no responsibility for any errors that may appear in this document.