I960 Search Results

A23B

Contextual Info: SIEMENS CMPNTS t OPTO MME D • A23b 35 b ODGSGDb 1 B S IE X IL101B SIEMENS HIGH SPEED THREE STATE OPTOCOUPLER -M I-3 } Package Dimensions in Inches mm no G K» AN O D E { 5 - y 3 Vcc f- 3 G A TE (6 10) C ATHODE E i960) ncQ - y tg] t¿i tjr W3 * 3

Contextual Info: 80960RP 1.0 1.2 ABOUT THIS DOCUMENT Terminology In this document, the following terms are used: This data sheet contains ADVANCE INFORMATION about Intel’s i960 RP processor, including a func­ tional overview, mechanical data package signal locations and simulated thermal characteristics ,

TS PQ4 12

Abstract: TS PQ4 24 ts pq4 10 TS PQ4 20 TS PQ4 120
Contextual Info: in y 1.0 80960HA/HD/HT About This Document This document describes the parametric performance of Intel’s 80960Hx embedded superscalar microprocessors. Detailed descriptions for functional topics — other than parametric performance — are published in the i960 H x M icroprocessor U ser’s Guide 272484 .

micro instruction set of I960 hx

Abstract: 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA Intel i960
Contextual Info: Intel i960® Processors i960® Architecture Family Product Highlights • 32-bit register-based RISC core in all processors ■ Code compatibility across entire product line ■ Broad selection of price and performance levels ■ Ideal for networking and imaging

AV96JA0330420

Abstract: V350EPC V350EPC-33LPA1 V350EPC-40LPA1 V380SDC V96BMC V96SSC PCI bridge
Contextual Info: V350EPC ENHANCED PCI BRIDGE CONTROLLER For 32-bit Multiplexed Address/Data Bus Fully compliant with PCI Local Bus Specification, Revision 2.1 Configurable for system master, PCI master, or PCI target operation 32-bit, 33 MHz PCI bus interface Direct interface to Intel i960®

Contextual Info: ü ja lile o . GT-96010 Remote Access Coprocessor Preliminary Revision 1.0 8/12/97 Please contact Galileo Technology for possi b e updates before finalizing a design. FEATURES * Integrated serial communications controller and system core logic device - Direct interface to i960 Jx family of CPUs

RC32364

Abstract: 80960CA IDT79RC32364
Contextual Info: Integrated Device Technology, Inc. Achieving Compatibility Between the Intel i960 and the RC32364 Embedded Microprocessor Application Note AN-155 By: Salahuddin Ameer Introduction The IDT79RC32364 is a new low-cost, lowpower member of the Integrated Device Technology, Inc. IDT RISControllerTM series of

i960RP

Contextual Info: i960 1.0 ABOUT THIS DOCUMENT 1.2 This data sheet contains advance inform ation about Intel’s i960 RP I/O processor at 5 Volts referred to as 80960R P 33/5.0 , including a fu n ctio n a l overview, m echanical data (package signal locations and simulated therm al characteristics), targeted electrical

MCM69F618C

Abstract: MCM69F618CTQ10 MCM69F618CTQ12 MCM69F618CTQ8R MCM69F618CTQ9 MCM69F618CTQ9R
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 64K x 18 Bit Flow–Through BurstRAM Synchronous Fast Static RAM The MCM69F618C is a 1M–bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the 68K Family, PowerPC, 486, i960, and Pentium microprocessors. It is organized as 64K

Contextual Info: V350EPC Rev A0 ENHANCED PCI BRIDGE CONTROLLER For 32-bit Multiplexed Address/Data Applications BLOCK DIAGRAM • Glueless interface to Intel’s i960 Jx and IBM PowerPC 401Gx processors • I2O ATU and messaging unit including hardware controlled circular queues

i960Cx

Abstract: AA10 V96BMC V96BMC-33LP V96BMC-40LP
Contextual Info: V96BMC Rev. D HIGH PERFORMANCE BURST DRAM CONTROLLER FOR i960Cx/Hx/Jx PROCESSORS • Pin/Software compatible with earlier V96BMC. • Software-configured operational parameters. • Direct interfaces to i960Cx/Hx/Jx processors. • Integrated Page Cache Management.

transistor B1010

Abstract: ifx780 fast page mode dram controller 74F244 74F257 A-20 DA10 I960 MC88915 AP-704
Contextual Info: A AP-706 APPLICATION NOTE DRAM Controller for 40 MHz i960 CA/CF Microprocessors Sailesh Bissessur SPG EPD 80960 Applications Engineer Intel Corporation Embedded Processor Division Mail Stop CH5-233 5000 W. Chandler Blvd. Chandler, Arizona 85226 February 2, 1995

chromerics

Abstract: OV26 80960JF 80960RP AD10 AD11 MA11 272736 27248 i960RP
Contextual Info: ADVANCE INFORMATION i960 RP I/O PROCESSOR • 33 MHz, 5.0 Volt Version 80960RP 33/5.0 • Complies with PCI Local Bus Specification Revision 2.1 • High Performance 80960JF Core ■ ■ ■ ■ ■ DMA Controller — Sustained One Instruction/Clock Execution

AD29

Abstract: AD30 V350EPC V350EPC-33 V350EPC-40 V960PBC V961PBC V96BMC
Contextual Info: V350EPC Rev. A0 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface to Intel’s i960Jx and IBM’s PowerPCTM 401Gx processors • On-the-fly byte order endian conversion • I2O ATU and messaging unit including hardware controlled circular queues

i960 KB Processor

Abstract: Pic PID control code 80960RP MON960
Contextual Info: i960 Processor Library Supplement Order Number: 651231-002 Revision Revision History Date -001 Original Issue. 02/96 -002 Revised for Release 5.1. 01/97 In the United States, additional copies of this manual or other Intel literature may be obtained by writing:

sbc 486

Abstract: MCM69P536C MCM69P536CTQ4 MCM69P536CTQ4R MCM69P536CTQ5 MCM69P536CTQ5R MCM69P536CTQ6 MCM69P536CTQ6R MCM69P536CTQ7 MCM69P536CTQ7R
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 32K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM The MCM69P536C is a 1M–bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the 68K Family, PowerPC, 486, i960, and Pentium microprocessors. It is organized as 32K

Contextual Info: OPERATING SYSTEMS JMI SOFTWARE SYSTEMS, INC. C EXECUTIVE* Real-Time, Multitasking, ROMable • ■ ■ ■ ■ ■ ■ ■ ■ ■ Real-Time, Multitasking, Kernel Optimized For C Language Embedded Applications on the i960 Processor Family Fast System Call Mechanism For

I960

Abstract: tutorial Intel i960 benchmark
Contextual Info: SOFTWARE DEBUG TOOLS INTEL CORPORATION QUICKval i960 Processor Starter Kits • ■ ■ ■ ■ ■ GNU/960 DOS Host CrossDevelopment Toolset Full Featured Cyclone Evaluation Board Including CPU Module Example Programs That Demonstrate the Power of the i960®

IN1016

Abstract: 80960HA 80960HD 80960HT 80960JA 80960JD 80960JF 80960JT PQFP 128 Fast Ethernet Risc
Contextual Info: i960 JA/JF/JD/JT Microprocessors PRODUCT HIGHLIGHTS • Low Power Modes ■ Improved cache design ■ State of the art testability ® ■ i960 processor compatible RISC core ■ 100 MIPS execution for the JT-100 ■ 16-Kbyte 2-way set associative instruction

QIC-24

Abstract: i960 compiler ctools MCS-96 Macro Assembler Users guide
Contextual Info: Getting Started with  the i960 Processor Development Tools Order Number: 485544-005 Revision Revision History Date -001 Original issue for CTOOLS960 R4.5 and GNU/960 R2.4. 05/94 -002 Original issue for CTOOLS960 & GNU/960 R4.6, and MON R2.1. 12/94 -003

cc196

Abstract: A-31 IEEE-695 ctools960 i960KB 80960KB Programmer Reference manual i960HA ASM96
Contextual Info:  i960 Processor Software Utilities User’s Guide Order Number: 485277-005 Revision Revision History Date -001 Original Issue. 12/92 -002 Minor corrections. 09/93 -003 Revised for CTOOLS960 R4.5 and GNU/960 R2.4. 05/94 -004 Revised for R5.0. 02/96 -005

disassembler

Abstract: ML4400 processor I960
Contextual Info: LOGIC ANALYZERS AMERICAN ARIUM ML 4400/TGI-960 Logic Analyzer and Disassembler • ■ ■ ■ ■ ■ ■ Full Disassembly Support for i960 Microprocessors Supports i960 Processor Speeds at Maximum Frequencies Symbolic Debug in Disassembly Time Stamp and Performance

CONNECTOR DB26

Abstract: pci to dual port ram interface 80960CF DB26 EIA530 TR-30 SCSI 2 connector
Contextual Info: NETWORKING SDL COMMUNICATIONS, INC. CC3i High Performance T3/FT3 Adapter For The PCI Bus Feature Summary • 33 MHz i960 CF Processor ■ 1 MB Packet RAM ■ 256K Code RAM ■ 0.5 MB Flash RAM ■ VLSI HDLC Controller VHC ■ 32-Bit PCI Interface ■ 16/32 Bit CRC

80960VH

Abstract: FF30 273174
Contextual Info: i960 VH Embedded-PCI Processor Specification Update November 1998 Notice: The 80960VH may contain design defects or errors known as errata. Characterized errata that may cause 80960VH’s behavior to deviate from pubished specifications are documented in this specification update.