TAG L7 Search Results

IDT7174

Abstract: IDT71B74 L7C174PC12 L7C174PC15 L7C174PC20 L7C174PC25 L7C174WC
Contextual Info: L7C174 L7C174 DEVICES INCORPORATED 8K x 8 Cache-Tag Static RAM 8K x 8 Cache-Tag Static RAM DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic ❑ High Speed Address-to-MATCH — 12 ns maximum ❑ High Speed Flash Clear

Contextual Info: 4K x 4 CMOS Cache-Tag Static RAM FEATURES_ DESCRIPTION _ □ 4K x 4 CMOS Static RAM with 4-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 10 ns maximum □ Totem Pole L7C180 or Open Drain (L7C181) MATCH Output □ High Speed Hash Gear

datasheet of max233

Abstract: ANM031 10-25 l7 80c51 with secret rom MAX233 S0-S15 TAG C3 TAG B3 TAG C2 TAG C7
Contextual Info: ANM031 Secret Tag on 80C51 Family Microcontrollers Overview permits personalization of any electronic equipment using a 80C51 architecture. The Secret Tag is a feature which allows serialization of each microcontroller for identification of a specific equipment.

L7C174WC-15

Abstract: idt7174 l7c174wc15 L7C174CM20 L7C174WC25
Contextual Info: L7C174 L7C174 DEVICES INCORPORATED 8K x 8 Cache-Tag Static RAM 8K x 8 Cache-Tag Static RAM DEVICES INCORPORATED FEATURES DESCRIPTION ❑ Low Power Operation Active: 300 mW typical at 35 ns Standby: 500 µW typical ❑ Data Retention at 2 V for Battery Backup Operation

Contextual Info: L7C174 8K x 8 Cache-Tag Static RAM FEATURES_ □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum □ Low Power Operation

Contextual Info: L7C174 8K x 8 Cache-Tag Static RAM DEVICES INCORPORATED DESCRIPTION FEATURES □ 8K x 8 CMOS Static RAM w ith 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum

L7C180

Abstract: SSL4180
Contextual Info: 4K x 4 CMOS Cache-Tag Static RAM FEATURES_ □ 4K x 4 CMOS Static RAM with 4-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 10 ns maximum □ Totem Pole L7C180 or Open Drain (L7C181) MATCH Output □ High Speed Flash Clear □ Auto-Powerdown Design

Contextual Info: 1 7CA 7à L7C174 8K x 8 Cache-Tag Static RAM DEVICES INCORPORATED FEATURES □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum

ssl4180

Contextual Info: 4K x 4 CMOS Cache-Tag Static RAM FEATURES_ □ 4K x 4 CMOS Static RAM with 4-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 10 ns maximum □ Totem Pole L7C180 or Open Drain (L7C181) MATCH Output □ High Speed Flash Clear □ Auto-Powerdown Design

Contextual Info: jjjm MMMM ÆmSmmkjjjjjj jmSSm „„„I L7C174 mm 8K x 8 Cache-Tag Static RAM DEVICES INCORPORATED FEATURES □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time

2102 Static RAM

Abstract: L7C161PC
Contextual Info: LOGIC DEVICES INC 2bE D • SSbSTGS 00G107S G ■ -0 ? 4K x 4 CMOS Cache-Tag Static RAM FEATURES □ 4K x 4 CMOS Static RAM with 4-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 10 ns maximum □ Totem Pole L7C180 or Open Drain (L7C181) MATCH Output

L7C174WC-15

Contextual Info: L7C174 8K x 8 Cache-Tag Static RAM FEATURES DESCRIPTION □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum □ Low Power Operation

Contextual Info: 4K x 4 CMOS Cache-Tag Static RAM DESCRIPTION FEATURES □ 4K x 4 CMOS Static RAM with 4-bit Tag Com parison Logic □ High Speed Address-to-M A TCH — 10 ns m axim um □ Totem Pole L7C 180 or Open Drain (L7C 181) M ATCH O utput □ High Speed Flash Clear

84118 latch

Contextual Info: GS84118T/B 256K x 18 Sync Cache Tag TQFP, BGA Commercial Temp Industrial Temp FEATURES • 3.3V +10%/-5% Core power supply, 2.5V or 3.3V I/O supply. • Intergrated data comparator for Tag RAM application. • FT mode pin for FLOW THROUGH or PIPELINE operation.

Contextual Info: L7C174 8K x 8 Cache-Tag Static RAM FEATURES D E S C R IP T IO N □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum □ Low Power Operation

static ram 8K

Abstract: a37an
Contextual Info: L7C174 L7C174 iJ b V IO S 8K x 8 Cache-Tag Static RAM I N u u H H O K A I hi □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum

Contextual Info: 8K x 8 CMOS Cache-Tag Static RAM FEATURES □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — to 12 ns maximum □ Auto-Powerdown Design

Contextual Info: L7C174 8K x 8 Cache-Tag S tatic RAM D E V IC E S IN C O R P O R A TE D FEATURES □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear □ High Speed Read Access Time — 12 ns maximum

Contextual Info: CY7B180 CY7B181 s CYPRESS SEMICONDUCTOR 4K x 18 Cache Tag Features • Can be used as 4K x 18 SRAM • Supports 66-MHz cache for all major high-speed processors Functional Description T he CY7B180 and CY7B181 are high-perform ance B iC M O S cache tag R A M s orga­

Contextual Info: “ “ “ — “ L7C174 — — “ 8K x 8 Cache-Tag Static RAM D E VIC E S IN O O H P O H A TE • FEATURES DESCRIPTION □ 8K x 8 CM O S Static RA M w ith 8-bit Tag Com parison Logic □ High Speed A ddress-to-M A TC H — 12 ns m axim um □ H igh Speed Flash Clear

Contextual Info: J' ’ _ •■■■ ’WP’’ _ ^ _ L 7 C 1 7 3 /1 7 4 8K x 8 Cache-Tag Static RAM mm DEVICES INCORPORATED FEATURES □ 8K x 8 CMOS Static RAM with 8-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 12 ns maximum □ High Speed Flash Clear

B1-66

Contextual Info: GS84118T/B-166/150/133/100 166 MHz–100 MHz 8.5 ns–12 ns 3.3 V VDD 3.3 V and 2.5 V I/O 256K x 18 Sync Cache Tag TQFP, BGA Commercial Temp Industrial Temp Features • 3.3 V +10%/–5% core power supply, 2.5 V or 3.3 V I/O supply • Intergrated data comparator for Tag RAM application

GS84118-2000207

Abstract: DQ116
Contextual Info: GS84118T/B-166/150/133/100 166 MHz–100 MHz 8.5 ns–12 ns 3.3 V VDD 3.3 V and 2.5 V I/O 256K x 18 Sync Cache Tag TQFP, BGA Commercial Temp Industrial Temp Features • 3.3 V +10%/–5% core power supply, 2.5 V or 3.3 V I/O supply • Intergrated data comparator for Tag RAM application

Contextual Info: LOGIC DEVICES INC 2bE D • SSbSlOS DGDlQflQ T ■ 'n 8K X 8 CMOS Cache-Tag Static RAM FEATURES Q Data Retention at 2 V for Battery Backup Operation □ Plug Compatible with IDT 7174, MK48H74 □ Package Styles Available: