TC65D Search Results

GR-1244-CORE

Abstract: GR-253-CORE ZL30109 ZL30109QDG ZL30109QDG1
Contextual Info: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features November 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for

GR-1244-CORE

Abstract: GR-253-CORE ZL30109 ZL30109QDG ZL30109QDG1 TC65D
Contextual Info: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features November 2004 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for

ZL30102

Abstract: GR-1244-CORE ZL30102QDG ZL30102QDG1
Contextual Info: ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet Features • November 2005 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock

GR-1244-CORE

Abstract: GR-253-CORE ZL30109 ZL30109QDG ZL30109QDG1 T110
Contextual Info: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features April 2010 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces Ordering Information *Pb Free Matte Tin

GR-1244-CORE

Abstract: GR-253-CORE ZL30106 ZL30106QDG "network interface cards"
Contextual Info: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • • October 2004 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH

GR-1244-CORE

Abstract: ZL30102 ZL30102QDG ZL30102QDG1
Contextual Info: ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet Features April 2010 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock •

GR-1244-CORE

Abstract: ZL30100 ZL30100QDC ZL30100QD
Contextual Info: ZL30100 T1/E1 System Synchronizer Data Sheet Features June 2004 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbps and 1544 kbps interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces

Contextual Info: ZL30100 T1/E1 System Synchronizer Data Sheet Features February 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for

GR-1244-CORE

Abstract: GR1244-CORE ZL30101 ZL30101QDC ZL30101QDG1
Contextual Info: ZL30101 T1/E1 Stratum 3 System Synchronizer Data Sheet Features April 2010 • Supports Telcordia GR-1244-CORE Stratum 3 • Supports G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces Ordering Information ZL30101QDG1 64 Pin TQFP* Trays, Bake & Drypack

GR-1244-CORE

Abstract: GR-253-CORE MT90866 ZL30105 ZL30105QDG ZL30106 tc84l
Contextual Info: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for 2048 kbs

GR-1244-CORE

Abstract: ZL30102 ZL30102QDG
Contextual Info: ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet Features July 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock •

GR-1244-CORE

Abstract: ZL30100 ZL30100QDC ZL30100QDG1
Contextual Info: ZL30100 T1/E1 System Synchronizer Data Sheet Features February 2006 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for

GR-1244-CORE

Abstract: GR-253-CORE ZL30106 ZL30106QDG ZL30106QDG1 "network interface cards"
Contextual Info: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • November 2005 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH

Contextual Info: ZL30101 T1/E1 Stratum 3 System Synchronizer Data Sheet Features July 2005 • Supports Telcordia GR-1244-CORE Stratum 3 • Supports G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces

"network interface cards"

Contextual Info: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • • July 2005 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH

Contextual Info: ZL30100 T1/E1 System Synchronizer Data Sheet Features July 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces

HM 338

Contextual Info: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for 2048 kbs

Contextual Info: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features May 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for

Contextual Info: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • • June 2004 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH

GR-1244-CORE

Abstract: ZL30100 ZL30100QDC ZL30100QDG1
Contextual Info: ZL30100 T1/E1 System Synchronizer Data Sheet Features April 2010 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces

ZL30101QDC

Abstract: GR-1244-CORE GR1244-CORE ZL30101
Contextual Info: ZL30101 T1/E1 Stratum 3 System Synchronizer Data Sheet Features October 2004 • Supports Telcordia GR-1244-CORE Stratum 3 • Supports G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Ordering Information ZL30101QDC Supports ANSI T1.403 and ETSI ETS 300 011 for

Contextual Info: ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock •

GR-1244-CORE

Abstract: ZL30100 ZL30100QDC
Contextual Info: ZL30100 T1/E1 System Synchronizer Data Sheet Features October 2004 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for

ZL30105QDG1

Abstract: GR-1244-CORE GR-253-CORE ZL30105 ZL30105QDG ZL30106
Contextual Info: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTCA and H.110 Data Sheet Features April 2010 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for