TCO 990 Search Results

TCO 990

Abstract: TCO-999 TCO-973 tco-993 TCO-994 TCO-981 tco993 tco-97 tco 999 tco-570
Contextual Info: T C O -99 3, 9 9 4 0 .2 c c V ' J - X • « fi • /J'>3!iPKG (11.4 X9.6 X 2.0mm height m ax: f t ' i t 0.22cc) • t e iv 'A lit iW M m % TCO-994 TCO-993 u*ffl-ask 12.6 MHz, 12.8 MHz, 13 MHz, 14.4 MHz, 15.36 MHz 16.8 MHZ. 19.2 MHz, 19.44 MHz, 13.68 MHz,

THERMAL Fuse m20

Abstract: QL6600 AA10 QL6250 QL6250-4PQ208C QL6250-4PS484C QL6250-4PT280C QL6325 QL6500 K25 4032
Contextual Info: Eclipse Family Data Sheet •••••• Combining Performance, Density, and Embedded RAM Device Highlights Flexible Programmable Logic • 0.25 µ, 5 layer metal CMOS process Programmable I/O • High performance: <3.2 ns Tco • Programmable slew rate control

3841 9904

Abstract: 5053 resistor NCE 7190 DR 6236 078
Contextual Info: Section 1. Cyclone III Device Datasheet This section includes the following chapter: • Revision History Altera Corporation Chapter 1, DC and Switching Characteristics Refer to each chapter for its own specific revision history. For information on when each chapter was

tms 3878

Contextual Info: Section 1. Cyclone III Device Datasheet This section includes the following chapter: • Chapter 1, DC and Switching Characteristics Revision History Refer to each chapter for its own specific revision history. For information on when each chapter was updated, refer to the Chapter Revision Dates section, which appears

4046 PLL Designers Guide

Abstract: 8135 diode
Contextual Info: Section 1. Cyclone III Device Datasheet This section includes the following chapter: • Revision History Altera Corporation Chapter 1, Cyclone III Device Datasheet: DC and Switching Characteristics Refer to each chapter for its own specific revision history. For information on when each chapter was

i7 3612

Contextual Info: 1. DC and Switching Characteristics CIII52001-2.2 Electrical Characteristics Operating Conditions When Cyclone III devices are implemented in a system, they are rated according to a set of defined parameters. To maintain the highest possible performance and

3841 9904

Abstract: cl 5403 din 7984 c 5296 Horizontal Output transistor, NCE 7190
Contextual Info: Cyclone III Device Handbook, Volume 1 Preliminary Information 101 Innovation Drive San Jose, CA 95134 www.altera.com CIII5V1-2.0 Copyright 2008 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos

EP3C5E144

Abstract: transistor 3866 s din 7984 EP3C16Q240 8108 national instruments
Contextual Info: Cyclone III Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com CIII5V1-2.1 Copyright 2008 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

5252 F 1105 transistor

Abstract: max 8770 TMS 3617 fa 5571 AS 12308 c 5296 Horizontal Output transistor, transistor c 5936 circuit diagram EP3C25 pin guideline tms 3878
Contextual Info: Cyclone III Device Handbook, Volume 1 Preliminary Information 101 Innovation Drive San Jose, CA 95134 www.altera.com CIII5V1-2.0 Copyright 2008 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos

Contextual Info: böE D BENCHMARÖ ^ICROELEC 137601^ 0001145 754 H B E N bq2003 BENCHMARQ Fast Charge IC Features General Description > Fast charge and conditioning of nickel cadmium or nickel-metal hydride batteries The bq2003 Fast Charge IC provides comprehensive fast charge control

Contextual Info: Revision: Monday, January 4,1993 IM « •_ r «-ar CY7C373 PRELIMINARY CYPRESS = :~ ;r " SEMICONDUCTOR 64-Macrocell Flash PLD performance of the 22V10 to high-density PLDs. The 64 macrocells in the CY7C373 are di­ vided between four logicblocks. Each logic

EM641FT8

Abstract: EM641FT8V
Contextual Info: EM641FT8 Low Power, 512Kx8 SRAM Document Title 512K x8 bit Low Power Full CMOS Static RAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Nov. 20, 2007 Preliminary 0.1 0.1 Revision IDR Current from 1.5uA to 7uA Dec. 5, 2007 tOE from 25nsec to 30nsec with 55ns part

Contextual Info: PRELIMINARY C Y 7C 374i UltraLogic 128-Macrocell Flash CPLD Features • • • • 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface • Bus Hold capabilities on all l/Os and dedicated inputs

logic block diagram of cypress flash 370 device

Abstract: cypress flash 370 device SEM03 features cypress flash 370 7C371-2
Contextual Info: 7C373: Thursday, September 24,1992 .Revision: Monday,January4,1993 S7E D • 2 5 f l T L > t iE 00CH031 41E CYPRESS SEMICONDUCTOR ^ ^ s ts s s s 'Z ^ ^ i is m = ^ 'T'^' ci- PRELIMINARY Q Y PR ESS . • 128 macrocells in eight logic blocks

EM641FT8V

Contextual Info: EM641FT8V Series Low Power, 512Kx8 SRAM Document Title 512K x8 bit Low Power Full CMOS Static RAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Nov. 20, 2007 Preliminary 0.1 0.1 Revision IDR Current from 1.5uA to 7uA Dec. 5, 2007

EM641FT8T

Contextual Info: EM641FT8T Series Low Power, 512Kx8 SRAM Document Title 512K x8 bit Low Power Full CMOS Static RAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Nov. 20, 2007 Preliminary 0.1 0.1 Revision IDR Current from 1.5uA to 7uA Dec. 5, 2007

EM641FT8S

Abstract: EM641FT8S-55LF
Contextual Info: EM641FT8S Series Low Power, 512Kx8 SRAM Document Title 512K x8 bit Low Power Full CMOS Static RAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Nov. 20, 2007 Preliminary 0.1 0.1 Revision IDR Current from 1.5uA to 7uA Dec. 5, 2007

CY7C335-50WMB

Abstract: C3359
Contextual Info: = # CY7C335 C YPRESS Universal Synchronous EPLD Features • 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer — Feed back multiplexer

gal16v8a

Abstract: 20V8A gal 16v8 programming specification 20V8A25 16V8A XLXX
Contextual Info: Lattice Semiconductor GAL16V8A GAL20V8A Corporation m FE A TU R E S •HIGH PERFORMANCE ELsCMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 62.5 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 24 mA Outputs — UltraMOS III Advanced CMOS Technology

AX2003

Abstract: A1v9
Contextual Info: 19-0371; R e v 1; 7/95 N iC d /N iM H B a tte r y F a s t-C h a rg e C o n tro lle rs The MAX2003/MAX2003A are fast-charge battery charg­ ers with conditioning for NiCd (nickel cadmium) or NiMH (nickel-metal hydride) rechargeable batteries. The MAX2003A has the same features as the MAX2003 with

Contextual Info: 10 RIBS LOCATION V A R IE S DEPENDING ON CKT. SIZES CKT n n n n n n n n n NOLEX LOGO X TUBE P A R T NO. 8 9 990- 0007. ON TH E L E F T HAND SIDE OF TUBE . RED ARROW INDICATION A S T CKT 6.30 WINDOW FACING OUTW ARDS - E - REF: ORIEN TATIO N OF P A R T IN TUBE

features cypress flash 370

Abstract: cypress flash 370 device cypress flash 370
Contextual Info: Revision: Monday, January 4,1993 57E D • 550=1^2 □ D D tlQ21 573 ■ CYP 07 CY7C373 C VPRESS SEMICONDUCTOR PRELIMINARY 7M CYPRESS SEMICONDUCTOR 64-Macrocell Flash PLD perform ance o f the 22V10 to high-density PLD s. Features • 64 m acrocells in four logic blocks

C1573

Abstract: C0043
Contextual Info: Revision: Tuesday, December 22,1992 MAR ut WL* C 2 3 I993 CY7C375 PRELIMINARY CYPRESS SEMICONDUCTOR 128-Macrocell FLASH PLD Features Functional Description • 128 macrocells in eight logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock pins

Contextual Info: □PM D PS4 1 2 8 8 P 128K X 8 C M O S SRAM M O D U LE •o DESCRIPTION: The DPS41288P-100, -120, -150, -170 is a one megabit Static Random Access Memory SRAM , complete with memory interface logic and on-board capacitors, organized as 128KX 8 bit. The DPS41288P is ideally suited for high