TCSCS Search Results

TCSCS1A475KAAR

Abstract: TCSCS1A475
Contextual Info: SPECIFICATION • Supplier :Samsung electro-mechanics • Product : Tantalum capacitor • Samsung P/N : TCSCS1A475KAAR • User Part No : • Description : CAP,TANTAL,4.7㎌,10V,±10%,3216-16 • Date : Aug 23, 2013 1. Samsung Part Number TC ① ① ② ③

Contextual Info: SPECIFICATION • Supplier :Samsung electro-mechanics • Product : Tantalum capacitor • Samsung P/N : TCSCS1E155KAAR • User Part No : • Description : CAP,TANTAL,1.5㎌,25V,±10%,3216-16 • Date : Aug 23, 2013 1. Samsung Part Number TC ① ① ② ③

Contextual Info: SPECIFICATION • Supplier :Samsung electro-mechanics • Product : Tantalum capacitor • Samsung P/N : TCSCS0J107KBAR • User Part No : • Description : CAP,TANTAL,100㎌,6.3V,±10%,3528-19 • Date : Aug 23, 2013 1. Samsung Part Number TC ① ① ②

Contextual Info: SPECIFICATION • Supplier :Samsung electro-mechanics • Product : Tantalum capacitor • Samsung P/N : TCSCS1A476MAAR • User Part No : • Description : CAP,TANTAL,47㎌,10V,±20%,3216-16 • Date : Aug 23, 2013 1. Samsung Part Number TC ① ① ② ③

Contextual Info: SPECIFICATION • Supplier :Samsung electro-mechanics • Product : Tantalum capacitor • Samsung P/N : TCSCS0J336MPAR • User Part No : • Description : CAP,TANTAL,33㎌,6.3V,±20%,2012-12 • Date : Aug 23, 2013 1. Samsung Part Number TC ① ① ② ③

TCSCS1A106K

Contextual Info: SPECIFICATION • Supplier :Samsung electro-mechanics • Product : Tantalum capacitor • Samsung P/N : TCSCS1A106KAAR • User Part No : • Description : CAP,TANTAL,10㎌,10V,±10%,3216-16 • Date : Aug 23, 2013 1. Samsung Part Number TC ① ① ② ③

Contextual Info: SPECIFICATION • Supplier :Samsung electro-mechanics • Product : Tantalum capacitor • Samsung P/N : TCSCS1V475KCAR • User Part No : • Description : CAP,TANTAL,4.7㎌,35V,±10%,6032-25 • Date : Aug 23, 2013 1. Samsung Part Number TC ① ① ② ③

Contextual Info: Integrated Device Technology, Inc. 3.3V 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C3466 ADVANCE INFORMATION FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 20ns

Contextual Info: SL811HS Embedded USB Host/Slave Controller Features Introduction • First USB Host/Slave controller for embedded systems in the market with a standard microprocessor bus interface ■ Supports both full speed 12 Mbps and low speed (1.5 Mbps) USB transfer in both master and slave modes

tcscs

Abstract: scanlogic sl11 XC62HR3302MR SL11T 1N52288 3.3v smd regulator SL11-USB SL11 usb 2N2222A 48-PIN
Contextual Info: SL11/T USB Controllers Technical Reference ScanLogic Corporation 8 New England Executive Park Burlington, MA 01803 http://www.scanlogic.com ScanLogic Corporation SL11/T USB Controller Specification CONVENTIONS .5

49C466

Contextual Info: 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C466 IDT49C466A PRELIMINARY FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 10ns — Error Correct Time: 15ns

tcscs

Abstract: 1N52288 SL811HS scanlogic sl11 XC62HR3302MR SL11H sl11 usb pcmcia to usb controller 48-PIN SL11HT
Contextual Info: SL11H/T USB Host/Slave Controllers Technical Reference ScanLogic Corporation 8 New England Executive Park Burlington, MA 01803 http://www.scanlogic.com ScanLogic Corporation SL11H/T USB Host/Slave Controller Specification CONVENTIONS .5

Contextual Info: SL- 11 USB Cont rol l er Technical Reference OVERVIEW FEATURES The SL-11 USB Controller is a single chip USB peripheral device solution that enables interfacing to devices such as microprocessors and scanners. The SL11 USB Controller incorporates USB Serial Interface

S4 59A

Contextual Info: 3.3V 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C3466 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 20ns — Error Correct Time: 22ns

Contextual Info: IDT72605 IDT72615 C M O S S y n c B iF lF O 2 5 6 x 1 8 x 2 and 5 1 2 x 1 8 x 2 iitegzated Device Technology, lie . FEATURES: • Two independent FIFO m em ories for fully bidirectional data transfers • 256 x 18 x 2 organization IDT72605 • 512 x 18 x 2 organization (IDT72615)

Contextual Info: Features • Single 2.7V - 3.6V Supply • Sequential Access, Parallel I/O Architecture • Page Program Operation - Single Cycle Reprogram Erase and Program - 4096 Pages (264 Bytes/Page) Main Memory • Two 264-Byte Data Buffers - Allows Receiving of Data while

Contextual Info: CDP1826C HARRIS È S E M I C O N D U C T O R Ê CMOS 64-Word x 8-Bit Static RAM March 1997 Features Description • Ideal for Small, Low-Power RAM Mem ory Require­ ments in Microprocessor and Microcom puter Applica­ tions The CDP1826C is a general purpose, fully static, 64-word x

ST L6219 application note

Abstract: l6219 microstepping ST L6219 I01 PWM bipolar stepper motor circuit using L6219 25x8 L6219 power BJT anti saturation diode motors using DAC PwSSO24
Contextual Info: L8229 DUAL DMOS FULL BRIDGE STEPPER/DC MOTOR DRIVER PRELIMINARY DATA 1 • Features Figure 1. Package Flexible Motor Driver configurations: – Dual Full Bridge for one bipolar Stepping motor. – Dual or single DC motor driver. ■ Programmable by two input pins to achieve one

EDS-5000

Abstract: 4-phase BIPOLAR STEPPER MOTOR 5v
Contextual Info: 005520 Ó 5 £ 0 GENERAL PURPOSE MOTION CONTROL IC HEW LETT PACKARD ít ñ HCTL-1000 TEC H N IC A L DATA Features NOVEMBER 1985 f\Jt' 3 38 jm JC§ D ALE b2 C 4 37 D A D 3 /D B 3 c 5 36 H RESET A D 4 /D B 4 c 6 35 3 AD5/DB5 c 7 34 H E XTC LK N C *C DC, D C BRUSHLESS A N D STEPPER MOTOR

Contextual Info: GEC P L E S S E Y I S E M I C O N D U C T O R S I AN3192-1.2 December 1991 MA805 FUNCTION AND TIMING INFORMATION INTRO DUCTIO N Scope This guide is intended to supplement the MA805 Data Sheet DS3043-1 and explains only the standard 1553B functions. Section 1

EZ 728

Abstract: at45db321 code AT45DB321 PA10 PA11 PA12
Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial-interface Architecture • Page Program Operation - Single Cycle Reprogram Erase and Program - 8192 Pages (528 Bytes/Page) Main Memory • Optional Page and Block Erase Operations • Two 528-byte SRAM Data Buffers - Allows Receiving of Data while Reprogramming of

SD50 diode

Abstract: QUAD XNOR 49C466 IDT49C466 IDT49C466A MD55 MD56 S4 59A
Contextual Info: 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C466 IDT49C466A Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 10ns — Error Correct Time: 15ns

SD-41 trs

Contextual Info: IDT49C466 Integrated Device Technology, Inc. D a t a B o o k A, S e c t i o n 5 . 1 3 . P a g e 1 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT FEATURES: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 15ns

Contextual Info: SL811HS Embedded USB Host/Slave Controller Features Introduction • First USB Host/Slave controller for embedded systems in the market with a standard microprocessor bus interface ■ Supports both full speed 12 Mbps and low speed (1.5 Mbps) USB transfer in both master and slave modes