THE24 Search Results

Contextual Info: & 24LC01 Microchip IK 128 x 8 CMOS Serial Electrically Erasable PROM DESCRIPTION • Single supply with operation down to 2.5 volts • Low power CMOS technology - 2 mA active current typical — 100 nA standby current at 5.5 V — 30 nA standby current at 3.0 V

Contextual Info: 2 4 C 0 1 A / 0 2 A /0 4 A 1K/2K/4K 5V CMOS Serial EEPROMs FEATURES DESCRIPTION • • • • • • • • • • • The Microchip Technology Inc. 24C01A/02A/04A is a 1K/2K/4K bit Electrically Erasable PROM. The device is organized as shown, with a standard two wire serial

DIODE marking CK 6CA

Abstract: DIODE marking 7BA SG 6CA 6ca DIODE code 20c 7ba Diode HP5 637 409 SG 5BA MARKING CO5 sg 7ba ai cm1 100 1e8
Contextual Info: To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

Contextual Info: DS21Q41B PRELIMINARY DALLAS DS21Q41B Q u a d T I Framer SEMICONDUCTOR FEATURES FUNCTIONAL DIAGRAM • F o u rU DS1/ISDN-PRI framing transceivers • All four framers are fully independent • Frames to D4, ESF, and SLC-96 formats • 8 -b it parallel control port that can be connected to

Contextual Info: DS2152 P R E L IM IN A R Y D A L L A S s e m ic o n d u c to r DS2152 Enhanced T1 Single Chip Transceiver FEATURES PIN ASSIGNMENT • Complete DS1/ISDN-PRI transceiver functionality • Line Interface can handle both long and short haul trunks • 3 2 -b it or 12 8 -b it crystaH ess jitter attenuator

Contextual Info: DS2152 PRELIMINARY DALLAS DS2152 Enhanced T1 Single Chip Transceiver se m ic o n d u c to r FEATURES PIN ASSIGNMENT • Complete DS1/ISDN-PRI transceiver functionality • Line interface can handle both long and short haul trunks • 32-bit or 128-bit crystal-less jitter attenuator

Contextual Info: D A L L A S D S 1237 DRAM N onvolatizer C h ip s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • Converts DRAM into nonvolatile RAM A0 C 1 • Controls any density of DRAM • Wide backup supply voltage range • Automatically refreshes when power fail detection

AF2.5 din 74

Contextual Info: TNETX4090 ThunderSWITCH II 9-PORT 100-/1OOO-MBIT/S ETHERNET™ SWITCH • Single-Chip 100-/1000-Mbit/s Device • • Integrated Physical Coding Sublayer PCS Logic Provides Direct Interface to Gigabit Transceivers Port Trunking/Load Sharing for High-Bandwidth Interswitch Links

Contextual Info: 24A M ic r o c h ip 1KI2K A 1.8V CMOS Serial EEPROMs 0 1 /0 2 FEATURES DESCRIPTION • Single supply with operation down to 1,8V • Low power CMOS technology — 1m A active current typical — 10 iA standby current typical at 5.5V — 3 nA standby current typical at 1.8V

TRANSMITTER motorola mc 1376

Contextual Info: m m ß CML Semiconductor Products i 4-Level FSK Modem Data Pump FX929B Advance Information D/929B/1 May 1997 Features Applications • 4800 to 19200 b/s Operation • RCR STD-47 and RD-LAP* Systems • • Full Packet Data Framing 4-Level FSK Data Modulation

Contextual Info: SGS-TtiOMSON MK50H28 • U K ê T IM M Ê i MULTI LOGICAL LINK FRAME RELAY CONTROLLER SECTION 1 - FEATURES ■ Based on ITU Q.933 Annex A and T1.617 An­ nex D Standards for Frame Relay Service and Additional Pocedures for Permanent Virtual Circuits PVCs .

mk5021

Abstract: N393 BCNT DIP48 MK5027 MK50H28 PLCC52 Z8000 A 1905 LMI
Contextual Info: MK50H28 MULTI LOGICAL LINK FRAME RELAY CONTROLLER SECTION 1 - FEATURES Based on ITU Q.933 Annex A and T1.617 Annex D Standards for Frame Relay Service and Additional Pocedures for Permanent Virtual Circuits PVCs . Optional Transparent Mode (no LMI Protocol

Contextual Info: 24C01A & Microchip IK 128 x 8 CMOS Serial Electrically Erasable PROM FEATURES DESCRIPTION • • • • • • • • • • • The M icrochip Technology lnc24C 01 A is a 1 K bit Elec­ trically Erasable PROM. The device is organized as 128 x 8 bit memory with a two wire serial interface. Advanced

Contextual Info: 24AA174 M ic r o c h ip 16K 1.8V Cascadable CMOS Serial EEPROM with OTP Security Page FEATURES PACKAGETYPE • Single supply with operation down to 1.8V DIP • 16 Bytes OTP Secure Memory C A1 C A2 C 3 Vss C 4 1 8 - 1 mA active current typical - 10 p.A standby current typical at 5.5V

N393

Abstract: DIP48 MK50H25 MK50H27 MK50H28 PLCC52 Z8000 DAL13
Contextual Info: MK50H28 MULTI LOGICAL LINK FRAME RELAY CONTROLLER SECTION 1 - FEATURES Based on ITU Q.933 Annex A and T1.617 Annex D Standards for Frame Relay Service and Additional Pocedures for Permanent Virtual Circuits PVCs . Optional Transparent Mode (no LMI Protocol

82C206

Abstract: chipset 82c206 CS8220 82C206 datasheet 7682, 8-BIT oscillator 82C206F cs8220 neat 82C206-INTEGRATED 8254 TIMER cascading 74*612
Contextual Info: 82C206 INTEGRATEDPERIPHERAL CONTROLLER 100%Compatibleto IBM’” PC AT 114 bytes of CMOS RAM memory Fully compatible to Intel’% 8237 DMA controller, 8259 Interrupt controller, 8254 Timer/Counter, and Motorolarms146818 Real Time Clock 8 MHz DMA clock with programmable

AD5660

Abstract: AD5662
Contextual Info: Preliminary Technical Data 3 V/5 V, 16-Bit nanoDACTM D/A with 10 ppm/°C Max On-Chip Reference in SOT-23 AD5660 FEATURES Low power single 16-bit nanoDAC 12-bit accuracy guaranteed On-chip 1.25/2.5 V, 10 ppm/°c reference Tiny 8-lead SOT-23/MSOP package Power-down to 200 nA @ 5 V, 50 nA @ 3 V

marking aded

Contextual Info: rrw rn _ LTC1446/LTC1446L TECHNOLOGY D u a l i 2-Bit Rail-to-Rail M icropow er DACs in SO-8 FEATURES DESCFHPTlOn • Dual DACs with 12-Bit Resolution ■ 3V Operation LTC1446L : Ice = 650(jA Typ The LTC"1446/LTC1446L aredual 12-bit digital-to-analog

STR d 4412 PINS DETAILS

Abstract: dali n39l
Contextual Info: SGS-THOMSON iH lM M O e s M K 5 0 H 2 8 MULTI LOGICAL LINK FRAME RELAY CONTROLLER SECTION 1 - FEATURES • Based on ITU Q.933 Annex A and T1.617 An­ nex D Standards for Frame Relay Service and Additional Pocedures tor Permanent Virtual Circuits PVCs . ■ Optional Transparent Mode (no LMI Protocol

DIP48

Abstract: MK5021 MK5027 MK50H28 PLCC52 Z8000
Contextual Info: MK50H28 MULTI LOGICAL LINK FRAME RELAY CONTROLLER ADVANCE DATA SECTION 1 - FEATURES Based on ITU Q.933 Annex A and T1.617 Annex D Standards for Frame Relay Service and Additional Pocedures for Permanent Virtual Circuits PVCs . Optional Transparent (or no LMI/LIV Protocol

murata MA Series

Abstract: HPPC ma1033 MA20151JBN MA2039 MA10 MA20 MA69 ma1018 10n 500V capacitor
Contextual Info: A p p l i c at i o n S p e c i f i c Ca pa c i t o r s High Frequency Ceramic Capacitors MA Product Summary MA Series: The MA series highlights performance in a wide range of rated voltage from 50 to 500V. These high Q capacitors are ideal for applications in the

LCV14

Abstract: Rbl 69
Contextual Info: DS21Q41B DALLAS SEMICONDUCTOR FEATURES D S 2 1 Q 4 1 B Quad T1 Framer FUNCTIONAL DIAGRAM • FourT I DS1/ISDN-PRI framing transceivers • All four framers are fully independent • Frames to D4, ESF, and SLC-96 formats RECEIVE FRAMER ELASTIC STORE TRANSMIT

24C021

Contextual Info: m Advanced CAT24C161 /162 16K , CAT24C081 /082(8K) CAT24C041 /042(4K), CAT24C021 /022(2K) Supervisory Circuits with l2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog Timer FEATURES Watchdog Tim er on SDA for 24CXX1 Active High or Low Reset Outputs

Contextual Info: CYPRESS MbE D SEMICONDUCTOR ^ asa-Ttta oao74t.i T - M i- n - 3 8 CYPRESS SEMICONDUCTOR • Reduced Instruction Set Computer RISC Architecture — Simple format instructions — M ost instructions execute in a single cycle • Very high performance — 25-, 33-, and 40-MHz clock speeds