TIM 500 Search Results

Contextual Info: IBM11S2325H 2 M x 3 2 S O D IM M Module Features • 72-Pin Small Outline Dual-In-Line Memory Module • Performance: -70 rac RAS Access Tim e 60ns 70 ns tc A G CAS Access Tim e 15ns 20 ns A ccess Tim e From Address 30ns 35ns Cycle Tim e 104ns 124ns EDO Mode Cycle Tim e

CERAMIC LEADLESS CHIP CARRIER LCC 44

Abstract: atmel at28C010 AT28C010 5962-38267
Contextual Info: Features * Fast Read Access Tim e -1 2 0 ns * Autom atic Page W rite Operation Internal Address and Data Latches for 128-Bytes Internal Control Tim er * Fast W rite Cycle Tim e Page W rite Cycle Tim e -1 0 ms Maximum 1 to 128-Byte Page W rite Operation * Low Power Dissipation

500va transformer

Abstract: 500VA UL-506 217A transformer class 2 UL506 Class b 130C transformer transformer 230vac
Contextual Info: TIM 500 Revised : 03.2002 Product Type No.: Isolating Transformer TIM 500 Schematic Plan Technical Details Safety Standards Designated Voltage Designated Voltage Designated Current Designated Frequency Output Power Protection Index Protection Class Insulation Class

500va transformer

Abstract: 500VA transformer 230vac
Contextual Info: TIM 500 Revised : 02.2004 Product Type No.: Isolating Transformer TIM 500 Schematic Plan Technical Details Safety Standards Designated Voltage Designated Voltage Designated Current Designated Frequency Output Power Protection Index Protection Class Insulation Class

8401201RX

Abstract: 54ALS573J 54ALS573 QPL-38510
Contextual Info: 1 REVISIONS DATE DESCRIPTION LTR APPROVED - : — Change VI L , setup tim e s , hold tim es 29 Apr 1987 in p u t pulse w id th , and propagation delay tim e s. Delete minimum lim it s from I IL and propagation delay C tim e s. Convert to m ilit a r y drawing fo rm a t.

IC NE 555 8 pin

Abstract: 555c timer 555 Bi-stable IC 555 as temperature controller SE555C E555 ne555n on delay y off delay IC NE555N NE555N IC timer ic ne 555
Contextual Info: P roduct specification P hilips Sem iconductors Linear Products Timer NE/SA/SE555/SE555C PIN CONFIGURATIONS DESCRIPTION The 555 m onolithic tim ing circuit is a highly stable controller capable of producing accurate tim e delays, or oscillation. In the tim e delay

U-blox tim-st

Abstract: TIM-ST GPS TIM-ST-0-000-0 TIM-ST-0-000-1 sirf st data sheet IC 7447 TIM-ST-0-000-5 GSP2E TIM-ST TTL 7447
Contextual Info: TIM GPS Receiver Macro Component SiRFstar II Positioning Engine TIM is a fully self-contained low-cost GPS receiver based on the SiRFstar™ II GPS technology. With its innovative packaging technology the TIM GPS receiver is the ideal solution for high volume application with

Contextual Info: fJUN ì 1 1993 DALLAS SEMICONDUCTOR FEATURES DS1603 Elapsed Time Counter Module PIN ASSIGNMENT • Two 32 bit counters keep track of real tim e and elapsed tim e • Battery powered counter counts seconds from the tim e battery is attached until Vbat is less than 2.5 volts

TIM-LF-0-000-0

Abstract: TIM-LF AEK-LS-0-000-0 ASK-LS-0-000-0 TIM-LF-0-000-1 IC 7447 TTL 7447 U-blox AG ATR0600 ATR0620
Contextual Info: TIM-LF GPS Receiver Macro Component ANTARIS Positioning Engine TIM-LF is an ultra-low power GPS receiver macro component for use with active antennas. Based on the ANTARIS™ GPS positioning engine jointly developed by Atmel and u-blox, it offers excellent GPS performance. TIM-LF can run

TIM-LP-0-000-1

Abstract: TIM-LP-0-000-0 AEK-LS-0-000-0 ATR0600 ASK-LS-0-000-0 TIM-LP-0-000 IC 7447 TIM-LP-0-000-5 7447 IC IC 7447 All
Contextual Info: TIM-LP GPS Receiver Macro Component ANTARIS Positioning Engine The TIM-LP is an ultra-low power GPS receiver macro component. Based on the ANTARIS™ GPS positioning engine jointly developed by Atmel and u-blox, it offers excellent GPS performance. The TIM-LP can run custom applications on the

ic ne558

Abstract: SC 0406C
Contextual Info: Product spécification Philips Semiconductors Linear Products Quad timer NE558 PIN CONFIGURATION DESCRIPTION T he 556 Q uad Tim ers are m onolithic tim ing devices w hich can be used to produce fo u r independent tim ing functions. T he 556 output sinks current. These highly stable, general purpose controllers can

TIM-LP-0-000-0

Abstract: ANTARIS positioning engine IC 7447 16 channel GPS receiver module TIM-LP-0-000 AEK-LS-0-000-0 ASK-LS-0-000-0 ATR0600 DGPS receiver spi tim-lP-9
Contextual Info: TIM-LP GPS Receiver Module ANTARIS Positioning Engine The TIM-LP is an ultra-low power OEM GPS module with built-in low noise amplifier suitable for passive and active antennas. It provides two 3V serial ports, SPI and a set of configurable 3V I/O ports. The TIM-LP provides system resources

SO DIMM 72-pin

Contextual Info: IBM11S8325HP 8M x 32 SO D IM M M odule Features 72-Pin Small Outline Dual-In-Line Memory Module Performance: -60 I rac RA S Access Time 60ns tcAC CA S Access Tim e 15ns ÏAA Access Tim e From Address 30ns tRC Cycle Tim e 110ns W c E D O M ode Cycle Time 25ns

power transformer type E

Contextual Info: Trenntransformator TIM Isolating transformer TIM Range ü Doppelspannung für Reihen- oder Parallelschaltung Twin secondary windings for series or parallel connection ü Integrierter Kurzschluss- und Überlastschutz Integrated overload protection and short circuit proof

transformer 230 V 50 Hz

Contextual Info: Trenntransformator TIM Isolating transformer TIM Range ü Doppelspannung für Reihen- oder Parallelschaltung Twin secondary windings for series or parallel connection ü Integrierter Kurzschluss- und Überlastschutz Integrated overload protection and short circuit proof

NJM5550

Abstract: NJM555 NJM555M NJM555E HJM555L HJM559L
Contextual Info: NJM555 TIMER • G EN ER A L DESCRIPTION The NJM 555 m onolithic tim ing circuit is a highly stable controller capable o f producing accruate tim e delays or oscillation. In the time delay m ode, delay tim e is precisely controlled by only tw o external parts: a resistor and a capacitor. For operation as an oscillator, both the

Contextual Info: Digital Delay Units SERIES DDU-11H 5 Taps ECL Interfaced Test Conditions: • ■ ■ ■ Input p ulse-w idth: 150% of to ta l delay. Input pulse rise-tim e: 6 ns. Input pulse voltage: .7V R ise-tim e measured from 20% to 80% of leading edge. ■ Delay tim e measured at 50% of leading edge.

Contextual Info: Digital Delay Units SERIES DDU-11H 5 Taps ECL Interfaced Test Conditions: • ■ ■ ■ Input pulse-w idth: 150% o f to ta l delay. Input pulse rise-tim e: « 6 ns. Input pulse voltage: .7V R ise-tim e m easured from 20% to 80% of leading edge. ■ Delay tim e measured at 50% o f leading edge.

Contextual Info: MX-826 Q' n f f l C I Precision, High-Speed 8-Channel, Analog Multiplexers IN N O VATIO N a n a E X C E LLE N C E FEATURES • 170ns m axim um settling tim e to ±0.1% • 225ns m axim um settling tim e to ±0.01% • 400ns m axim um settling tim e to ±0.003%

TIM-4H-0-000

Abstract: TIM-4H TIM-LH TIM-4H-0-000-0 AEK-4P GPS antenna U-blox U-blox AG xtal.32.768 ATR0601
Contextual Info: TIM-4H ® ANTARIS 4 Programmable GPS Module with SuperSense Automotive Applications Overview Highlights The TIM-4H module combines high sensitivity with exceptionally low power consumption. The -158 dBm tracking sensitivity extends positioning coverage into

MOSFET 4420

Abstract: max4429epa max4429
Contextual Info: 19-0039; RevO; 11/92 / i / i / i x i / i / i High-Speed, 6A Single M OSFET Drivers _ A 4 0 n s delay tim e and a 25ns rise or fall tim e while driving

Contextual Info: KS555 CMOS INTEGRATED CIRCUIT CMOS SINGLE TIMER The KS555 is a CMOS tim e r w ith improved perform ance over a standard b ip o la r one. Due to its high-im pedance inpu ts, it is capable o f producing accurate tim e delays and o s c illa tio n s w ith less expensive sm aller tim in g

AEK-4H

Abstract: TIM-4S U-blox AG din IEC 68-2-6 gps chips u blox lea 4 U-blox pin diagram of 7447 ATR0601 ATR0610
Contextual Info: TIM-4S ® ANTARIS 4 ROM-Based GPS Module with SuperSense Automotive Applications Preliminary Data Overview Highlights The TIM-4S module combines high sensitivity and exceptionally low power consumption. Its -158 dBm tracking sensitivity extends positioning coverage into

navsync

Abstract: Motorola M12 navsync nco operation accuracy m12 gps cw12-tim motorola GPS receiver module motorola m12 Application Note gps nmea interface in atomic clock 0183 1pps
Contextual Info: CW12-TIM GPS Receiver Timing and Navigation Applications Description The CW12-TIM GPS receiver module is an integrated timing module powered by NavSync’s CW25 GPS receiver. It has been specifically designed for use in synchronization and timing applications,