TJ01 Search Results

mil-std-1553b SPECIFICATION

Abstract: honeywell dcs manual smd code A1t MIL-STD-1773 A1t smd TSI S 14001 1553 SUmmit me 555 AS1773 UT69151
Contextual Info: S f.lMMIT TM Reference Manual Aeroflex Colorado Springs 4350 Centennial Blvd. Colorado Springs, CO 80907 719-594-8000, 719-594-8468 fax www.aeroflex.com/radhard SJ.1MMITTMReference Manual Table of Contents Overview Presentation Section 1 Engineering Notebooks

MOC BTA

Abstract: DSP96002UM moc 2030 000004B0 BF740 xr 2277 BF299 AA06 AA1716 Nippon capacitors
Contextual Info: MOTOROLA Order this document by: DSP96002/D, Rev. 2 SEMICONDUCTOR TECHNICAL DATA DSP96002 32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT PROCESSOR The DSP96002 is desig n ed to su p p o rt intensive graphic im age a n d n u m eric processing. It is a d u al-p o rt, low -pow er, general p u rp o se floating-point processor. The DSP includes 1024

Contextual Info: MSD INC. ENGINEERING DATASHEET RELAY TYPE: ? C ^ '3 2 5 * C V 3 COMPUTER PART No. : S3$35»fc3 CUSTOMER/SPECIFICATION: CkTM-OG XTE.W1 REV N O M E . i \ Q% COIL RES.-. £ 9 0 O H M S TEST PROCEDURE MSDP- T 9 \ TE5T REQUIREMENTS OPERATE TIME: \^>nr>S VANX RELEASE TIME: \ b r r v S <\AAK.

74AC11239

Abstract: one line diagram AC1123
Contextual Info: id A m o ic i T d A n io io DUAL 2-LINE TO 4-LINE DECODERS/DEMu Lt IPLEXERS TI0138— D3319, JULY 1989—REVISED JANUARY 1990 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems 54AC11239 . . . J PACKAGE 74AC11239 . . . D OR N PACKAGE

tJ01

Abstract: PD76F p47ab 78F0034Y
Contextual Info: PRELIMINARY PRODUCT INFORMATION NEC MOS INTEGRATED CIRCUII ,uPD78F0034Y 8-BIT SINGLE-CHIP MICROCONTROLLER D ESCRIPTIO N T he iiP D 7 8 F 0 0 3 4 Y is a product of the jiPD 78 00 34 Y Subseries in the 78K/0 S e rie s and equivalent to the /1PD780034Y with a flash m em ory in place of internal ROM .

HDLC LAPB

Abstract: 33 gph fly back eia232 FM0 encoder IC siemens t137 siemens to2 t137 CHR10 pt 2258 encoder GT-96010A-P-0 TCDT 1102 D
Contextual Info: GT-96010A Remote Access Coprocessor Please contact Galileo Technology for possible updates before finalizing a design. FEATURES - Direct interface to i960 Jx family of CPUs • • • • • • • • - Interface to i960Hx and i486 with minimal glue logic

feme rele

Abstract: d27c1001 S3 TRIO 64 feme ft a 002 30 01
Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION T h e ¿IP D 78P 058F Y is a n E lectro M ag netic Interfac e E M I n oise red uctio n versio n of th e ¿/PD 78P058Y. T h e /iP D 7 8 P 0 5 8 F Y is a m em ber of th e ¿¿PD78058FY S u b se rie s of th e 78K /0 S e rie s, in w hich th e on-chip m ask

Contextual Info: SHIBA UC/UP SME D ^0^754=1 0023033 T03 TO SH IB A 1. INTRODUCTION 1.1 GENERAL TMP68HC05C4 The TMP68HC05C4 CMOS Microcomputer is a member of the 68HC05 Fam ily of low-cost single-chip microcomputers. This 8-bit microcomputer u n it (MCU) contains an on-chip oscillator, CPU, RAM, ROM, I/O, two serial interface systems, and tim er. The

UL1015

Contextual Info: TOROID International Ltd Transformer FB060/18 TJ-0132519 PRIMARY HO Vio 150mm 22AWG • V O”. .• SECONDARY * Red 150mm 22AWG 20.2V No Load g- o 18.0V 1.67A II Pi Date 16/07/01 Issue 2 150mm 22AWG 22AWG I 1 Blu 150mm v o- ■

TI013B

Abstract: AC1123 74AC11239 logic diagram of dual 2 to 4 decoder AC11239 TI0138
Contextual Info: DUAL 2-LINE TO 4-LtNE DECODERS/DEMULTIPLEXERS TI013B— D3319, JULY 1989— H EVISED JA N U AR Y 1990 54AC11239 . . . J PACKAGE 74AC11239 . . . D OR N PACKAGE • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems TOP VIEW

tJ01

Contextual Info: PRELIMINARY PRODUCT INFORMATION NEC MOS INTEGRATED CIRCUIT juPD78F0034 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION T h e ^ P D 7 8 F 0 0 3 4 is a p ro d uct of th e jiP D 7 8 0 0 3 4 S u b s e rie s in th e 7 8 K /0 S e r ie s a n d e q u iv a le n t to the