TMDV Search Results

ST330S12PO

Abstract: lg 330 c 151
Contextual Info: Phase Control SCR International IöR Rectifier V RRM/ ’ iSM Port V DRM 1RMS Number 00 A *T(*V) @ * C (A) (°C) (a) (b) VGT <61 (A) (A) (V) (A) @ I TMdv/dt R QfC(DC) (V) (A)(V//I>) (°C/W) Fax on Demand Case O utline Number Key Notes Thyristors TO-2Q9AE (TO -118 )

80C32

Abstract: DS2502-E48 DS80C400 DS80C400-FNY J-STD-020A
Contextual Info: DS80C400 Network Microcontroller www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS80C400 network microcontroller offers the highest integration available in an 8051 device. Peripherals include a 10/100 Ethernet MAC, three serial ports, a CAN 2.0B controller, 1-Wire Master, and 64 I/O pins.

BO-35

Abstract: CY7C43622 CY7C43632 CY7C43642 CY7C43662 CY7C43682 BO35 AQ35 bq35
Contextual Info: • CY7C 43622 C Y 7C 43632/C Y 7C 43642 C Y 7C 43662/C Y 7C 43682 ¡o x o w m . m p' rVv^ ' YX xP XR F ^ P R E L IM IN A R Y 256/512/1 K/4K/16K x36 x2 Bidirectional Synchronous FIFO Features F ully as yn ch ro n o u s and sim u ltan eo u s read an d w rite

Contextual Info: 3.3 VOLT CMOS SyncBiFlFO WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024x36x2 Integrated Device Technology, Inc. PRELIMINARY IDT72V3624 IDT72V3634 IDT72V3644 • M aster R eset clears d ata and configures FIFO, Partial R eset clears data but retains configuration settings

Contextual Info: | CMOS Bus-Matching SyncFlFO 256 x 36, 512 x 36,1,024 x 36 dt PRELIMINARY ¡DT723633 IDT723643 Integrated D ev ic e Techno logy, Inc. NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES:

Contextual Info: CMOS Clocked FIFO With Bus Matching and Byte Swapping IDT723613 64x36 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity FIFO buffering data from Port A

Contextual Info: ggSi'x jjûfey CMOS SyncBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 IDT723622 ¡DT723642 Integrated Device Technology, Inc. Advance inform ation for the IDT723622 Final for the IDT723632 Advance inform ation for the IDT723642 FEATURES: • Free-running CLKA and CLKB m ay be asynchronous or

Contextual Info: CMOS SyncBiFlFO 256x36x2, 512x36x2, 1,024x36x2 IDT723622 IDT723632 IDT723642 Hhtegiated Devize Technology, lie . NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES: • Free-running C LK A and CLKB may be asynchronous or

Contextual Info: CMOS SyncFIFO IDT723611 64x36 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B

Contextual Info: In te g ra te d D e v i e T e d h n o Jo g y , lie . CMOS Triple Bus SyncFlFO1 With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The May 20 errata describes corrections that have

Contextual Info: CMOS SyncBiFlFO WITH BUS MATCHING AND BYTE SWAPPING 64 x 36 x 2 IDT723614 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB can be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted

Contextual Info: 3.3 VOLT CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 • Passive parity checking on each Port • Parity Generation can be selected for each Port • Available in 132-pin plastic quad flat package PQF , or space saving 120-pin thin quad flat package (TQFP)

Contextual Info: Integrated Device Technology, Inc. CMOS Sync BiFlFO With Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 PRELIMINARY IDT723624 IDT723634 IDT723644 NOTE: There is an errata notice on the last page and the corrections have not been incorporated into this document.

Contextual Info: |dy Integrated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2

8A35

Abstract: ic lm 317 CY7C43623 CY7C43633 CY7C43643 CY7C43663 CY7C43683
Contextual Info: CYPRESS P R E L IM IN A R Y C Y 7C 43623 C Y 7C 43633/C Y 7C 43643 C Y 7C 43663/C Y 7C 43683 256/512/1K/4K/16K x36 Unidirectional Synchronous FIFO w / Bus Matching Features F ully as y n c h ro n o u s and sim u lta n e o u s read and w rite o p e ratio n p erm itted

IC51-1324-828

Abstract: IDT723612
Contextual Info: IDT723612 CMOS SyncBiFIFO 64 x 36 x 2 Integrated Device Technology, Inc. • • • • Low-power advanced CMOS technology Supports clock frequencies up to 67 MHz Fast access times of 10ns Available in 132-pin plastic quad flat package PQF or space-saving 120-pin thin quad flat package (TQFP)

IC51-1324-828

Abstract: IDT723652 IDT723662 IDT723672
Contextual Info: CMOS SyncBiFIFOTM 2,048 x 36 x 2 4,096 x 36 x 2 8,192 x 36 x 2 FEATURES: PRELIMINARY IDT723652 IDT723662 IDT723672 Select IDT Standard timing using EFA EFA, EFB EFB, FFA and FFB flags functions or First Word Fall Through timing (using ORA, ORB, IRA and IRB flag functions)

IDT723611

Abstract: IDT72V3611
Contextual Info: IDT72V3611 3.3 VOLT CMOS SyncFIFO 64 x 36 COMMERCIAL TEMPERATURE RANGE 3.3 VOLT CMOS SyncFIFO 64 x 36 PRELIMINARY IDT72V3611 Integrated Device Technology, Inc. • Parity Generation can be selected for each Port • Available in 132-pin Plastic Quad Flatpack PQF or

723674

Abstract: IDT723654 IDT723664 IDT723674
Contextual Info: CMOS SyncBiFIFOTM WITH BUS-MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2, 8,192 x 36 x 2 FEATURES: PRELIMINARY IDT723654 IDT723664 IDT723674 ♦ Port B bus sizing of 36 bits long word , 18 bits (word) and 9 bits (byte) ♦ Big- or Little-Endian format for word and byte bus sizes

Contextual Info: CS5321 High Dynamic Range Delta-Sigma Modulator Features Description • Delta-Sigm a Architecture - Fourth-Order Modulator - Variable Sample Rate - Internal Track-and-Hold Amplifier • Clock Jitter Tolerant Architecture • Dynamic Range - 121 dB @ 411 Hz Bandwidth

IC51-1324-828

Abstract: IDT72V3631 IDT72V3641 IDT72V3651 DN B34 PF5101
Contextual Info: 3.3 VOLT CMOS SyncFIFOTM 512 x 36, 1,024 x 36, and 2,048 x 36 FEATURES: ♦ PRELIMINARY IDT72V3631 IDT72V3641 IDT72V3651 ♦ Available in 132-pin plastic quad flat package PQFP or spacesaving 120-pin thin quad flat package (TQFP) ♦ Pin and functionally compatible versions of the 5V operating

IDT72V3626

Abstract: IDT72V3636 IDT72V3646
Contextual Info: 3.3 VOLT CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 FEATURES: PRELIMINARY IDT72V3626 IDT72V3636 IDT72V3646 • Serial or parallel programming of partial flags • Big- or Little-Endian format for word and byte bus sizes

IDT723623

Abstract: IDT723633 IDT723643 B35b
Contextual Info: CMOS Bus-Matching SyncFIFO 256 x 36, 512 x 36, 1,024 x 36 PRELIMINARY IDT723623 IDT723633 IDT723643 Integrated Device Technology, Inc. NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES:

SDH 209

Abstract: IC51-1324-828 IDT723631 IDT723641 IDT723651
Contextual Info: CMOS SyncFIFO 512 x 36, 1,024 x 36 and 2,048 x 36 IDT723631 IDT723641 IDT723651 Integrated Device Technology, Inc. FEATURES: • Storage capacity: • • • • • • • • • • IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36