TS83084G Search Results

Contextual Info: Features • Programmable DMUX Ratio: • • • • • • • • • • • • • • – 1:4: Data Rate Max = 1 Gsps – PD 8b/10b < 4.3/4.7 W (ECL 50Ω output) – 1:8: Data Rate Max = 2 Gsps – PD (8b/10b) < 6/6.9 W (ECL 50Ω output) – 1:16 with 1 TS8388B or 1 TS83102G0 and 2 DMUX

porte logique

Abstract: porte logique and TS83084G0 circuit logique Transistor 8c4 TS83084G TS81102G0 TS83102G0 TS8388B TSEV8388G
Contextual Info: MAIN FEATURES ! Programmable DMUX ratio : 1:4 : Data rate max = 1 Gsps, PD 8b/10b < 4.3 / 4.7 W (ECL 50Ω output) 1:8 : Data Rate max = 2GSPS, PD (8b/10b)< 6 / 6.9 W (ECL 50Ω output) 1:16 with 1 TS8388B or 1 TS83102G0 and 2 DMUX. ! Parallel output mode.

QFP PACKAGE thermal resistance

Abstract: 017AG QFP PACKAGE thermal resistance die down ceramic QFP Package 100 lead TS83084G0 CQFP68 TS81102G0 TS8308500GL TS83102G0B TS8388BGL
Contextual Info: Packaging of Atmel Data Conversion Circuits Introduction This document aims at highlighting the main issues in thermal management for fast and dense devices such as the Atmel Data Conversion products ADCs and DMUX . It especially deals with packaging, electrical and thermal considerations in order to put

TS83084G0

Abstract: CQFP68 TS81102G0 TS83102G0 TS8388B TSEV8388G
Contextual Info: Features • Programmable DMUX Ratio: • • • • • • • • • • • • • • – 1:4: Data Rate Max = 1 Gsps – PD 8b/10b < 4.3/4.7 W (ECL 50Ω output) – 1:8: Data Rate Max = 2 Gsps – PD (8b/10b) < 6/6.9 W (ECL 50Ω output) – 1:16 with 1 TS8388B or 1 TS83102G0 and 2 DMUX