TSOPII54 Search Results

Contextual Info: TSOPII54-P-400-0.80-K Unit in millimeters typ., unless otherwise specified. Semiconductor Please consult OKI for soldering, assembly and storage recommendations. Specification are subject to change without notice. The drawings do not substitute or replace a product’s datasheet or the Package Information Databook.

16Mx8

Abstract: pc133 SDRAM DIMM W9D332647LA-333 079R 32X64 32X64 144 pin
Contextual Info: REVISIONS DATE REV I. DESCRIPTION: DESCRIPTION ZONE 6/29/01 LUISA T Ÿ W9D332647LA-333 is a 32Mx64 industry standard 168-pin PC-133 SDRAM DIMM Ÿ Manufactured with 16 16Mx8 400-mil TSOPII-54 PC-133 Synchronous DRAM devices of 12-row, 10-column, 4-bank addressing.

222k

Abstract: 079R PC-100 PC100-222 KO9018
Contextual Info: REVISION DATE REV DESCRPTION ZONE APPVD 6/26/01 III. TIMING I. DESCRIPTION: Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ W9Q316727KD-222K is a 16Mx72 industry standard 168-pin PC100-222 SDRAM ECC DIMM Manufactured with 18 NEC ELPIDA 8Mx8 400-mil TSOPII-54 100 MHz Synchronous DRAM devices of 12-row, 9-column, 4 -bank addresing.

Contextual Info: Pr E2G1050-17-X1 el im y 4-Bank ¥ 4,194,304-Word ¥ 4-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62400/H is a 4-bank ¥ 4,194,304-word ¥ 4-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and

D56V62160

Abstract: BA RX transistor d56v621 3tr5
Contextual Info: O K I Semiconductor MD56V62160/H 4-Bank x 1,048,576-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM D E SCRIPTIO N T he M D 5 6 V 6 2 1 6 0 /H is a 4 -b a n k x 1,048,576-w ord x 16-bit sy n c h ro n o u s d y n a m ic R A M , fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs

Contextual Info: TVP5160EVM User’s Guide SLEU063 – March 2005 TVP5160EVM User’s Guide Digital Video Department 1 2 3 4 5 6 7 8 9 10 Contents Functional

39S256160T

Abstract: PC100-333-620 IT191 s4 marking code siemens SMD MARKING CODE A12 smd marking KH P-TSOPII-54
Contextual Info: H Y B 39S 25 640 0/8 00/1 60 T 256M B it S ynch ro n o u s DRAM S IE M E N S 2 5 6 M B it S y n c h ro n o u s D R A M P re lim in a ry In fo rm a tio n • High Perform ance: Multiple Burst Operation -8 -8B -10 Units fC K 125 100 100 M Hz tC K 3 8 10 10 ns

active suspension

Abstract: MD56V62800A
Contextual Info: Pr E2G1054-18-62 el im y 4-Bank ¥ 2,097,152-Word ¥ 8-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62800A is a 4-bank ¥ 2,097,152-word ¥ 8-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and

MD56V62160

Contextual Info: Pr E2G1052-17-X1 el im y 4-Bank ¥ 1,048,576-Word ¥ 16-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62160/H is a 4-bank ¥ 1,048,576-word ¥ 16-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs

TC59SM816

Contextual Info: TC59SM816/08/04BFT/BFTL-70,-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDS x 4 BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM 8,388,608-WORDS × 4 BANKS × 8-BITS SYNCHRONOUS DYNAMIC RAM 16,777,216-WORDS × 4 BANKS × 4-BITS SYNCHRONOUS DYNAMIC RAM

133M

Abstract: TC59SM816 TC59SM816CFTI-75
Contextual Info: TC59SM816CFTI-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDS x 4 BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM DESCRIPTION TC59SM816CFTI is a CMOS synchronous dynamic random access memory organized as 4,194,304-words × 4

MD56V62400

Abstract: MD56V62400H TSOPII54
Contextual Info: お客様各位 資料中の「沖電気」「ＯＫＩ」等名称の OKI セミコンダクタ株式会社への変更について 2008 年 10 月 1 日を以って沖電気工業株式会社の半導体事業は OKI セミコン ダクタ株式会社に承継されました。 従いまして、本資料中には「沖電気工業株

Contextual Info: V437432E24VD 3.3 VOLT 32M x 72 HIGH PERFORMANCE REGISTERED SDRAM ECC MODULE Features Description • 168 Pin Registered ECC 33,554,432 x 72 bit Oganization SDRAM Modules ■ Utilizes High Performance 32M x 8 SDRAM in TSOPII-54 Packages ■ Fully PC Board Layout Compatible to INTEL’S

P-TSOPII-54

Abstract: caz smd PC133 registered reference design
Contextual Info: HYB 39S64400/800/160ET L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM Preliminary Datasheet • Automatic and Controlled Precharge Command • High Performance: -7 -7.5 -8 Units fCKMAX 143 133 125 MHz tCK3 7 7.5 8 ns tAC3 5.4 5.4 6 ns tCK2 7.5 10 10

Contextual Info: TOSHIBA TENTATIVE TC59S6416/08/04CFT/CFTL-75#-80#-10 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 1.048.576-WORDSX4BANKSx 16-BITS SYNCHRONOUS DYNAMIC RAM 2,097,152-WORDSX4BANKSX8-BITS SYNCHRONOUS DYNAMIC RAM 4,194,304-WORDSX4BANKSX4-BITS SYNCHRONOUS DYNAMIC RAM

HC49U-V

Abstract: clrc632 antenna clrc632 firmware MAX232 smd MFAN700 RC632 CLRD701 USB Interface IC NXP SAB-C161U-LF antenna 13.56MHz clrc632
Contextual Info: CLRM701 Mifare & ICODE contactless reader module Rev. 3.2 — 24 May 2007 Product data sheet 101432 PUBLIC 1. General description This document describes the functionality of the CLRM701 reader module. It includes the functional and electrical specifications and gives the needed details to use this reader

active suspension

Abstract: MD56V62800A
Contextual Info: Dear customers, About the change in the name such as "Oki Electric Industry Co. Ltd." and "OKI" in documents to OKI Semiconductor Co., Ltd. The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI Semiconductor Co., Ltd. on October 1, 2008.

MD56V62160

Abstract: MD56V62160H TSOPII54
Contextual Info: お客様各位 資料中の「沖電気」「ＯＫＩ」等名称の OKI セミコンダクタ株式会社への変更について 2008 年 10 月 1 日を以って沖電気工業株式会社の半導体事業は OKI セミコン ダクタ株式会社に承継されました。 従いまして、本資料中には「沖電気工業株

SMD MARKING T20

Abstract: smd marking T22 MARKING A3 SMD MARKING CODE a09
Contextual Info: HYB 39S64400/800CT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • High Performance: • Full page (optional) for sequential wrap around • Multiple Burst Read with Single Write Operation -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns • Automatic and Controlled Precharge

P-TSOPII-54

Abstract: PC133 registered reference design
Contextual Info: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • High Performance: • Multiple Burst Read with Single Write Operation -7 -7.5 -8 Units fCK 143 133 125 MHz • Automatic and Controlled Precharge Command tCK3 7 7.5 8 ns • Data Mask for Read/Write Control (x4, x8)

marking code EY SMD

Abstract: PC100-222-620 P-TSOPII-54
Contextual Info: HYB39L256160AC/T 256MBit 3.3V Mobile-RAM 256 MBit Synchronous Low-Power DRAM Data Sheet Revision Dec. 2002 • Automatic and Controlled Precharge Command Features -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and full page tCK3,MIN

HYB39S256400FE-7

Abstract: HYI39S256160FE7 HYB39S256160FT-7 hyb39s256800fe HYB39S256800FE-7 HYB39S256400FF-7 HYB39S256407FE HYB39S256160 HYB39S256160FE HYI39S256160
Contextual Info: September 2007 HY[B/I]39S256[40/80/16]0FT L HY[B/I]39S256[40/80/16]0FE(L) HYB39S256[40/80/16]0FF(L) HYB39S 256407 F E 256-MBit Synchronous DRAM SDRAM Internet Data Sheet Rev. 1.42 Internet Data Sheet HY[B/I]39S256[40/80/16][0/7]F[E/T/F](L) 256-MBit Synchronous DRAM

39S256160T

Abstract: TSOP54-2 APA10 39S256160T-8 39S256400T-8
Contextual Info: H YB39S25640x/80x/16xT 256MBit Synchronous DRAM SIEMENS 256 MBit Synchronous DRAM Target Information Rev. 0.6 • High Performance: Multiple Burst Operation -8 -10 Units fCK 125 100 MHz tCK3 8 10 ns tAC3 6 7 ns Automatic Command and Read with Single Controlled

PC133-333-520

Abstract: PC100-222 PC133-222 PC133-333 L-DIM-168-33 PC133 registered reference design
Contextual Info: HYS 64/72V32300GU SDRAM-Modules 3.3 V 32M x 64/72-Bit, 256MByte SDRAM Modules 168-pin Unbuffered DIMM Modules • Single + 3.3 V ± 0.3 V power supply • 168 Pin unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications using 256Mbit technology.