V61C51 Search Results

Contextual Info: • Packages – 44-pin TSOP – 44-pin 400 mil SOJ Features ■ ■ ■ ■ ■ ■ ■ PRELIMINARY V61C51164096 256K X 16 HIGH SPEED STATIC RAM MOSEL VITELIC High-speed: 15, 20, 25 ns Fully static operation All inputs and outputs directly TTL compatible

Contextual Info: M O S E L V IT E LIC PRELIMINARY INFORMATION V61C51161024 6 4 K x 16 STATIC RAM Features Description • ■ ■ ■ ■ The V 61C 51161024 is a 1,048,576-bit static random -access memory organized as 65,536 words by 16 bits. Inputs and three-state outputs are

V61C5181024

Contextual Info: MOSEL VITELIC • Packages – 32-pin TSOP – 32-pin 300 mil SOJ Features ■ ■ ■ ■ ■ ■ ■ PRELIMINARY V61C5181024 128K X 8 HIGH SPEED STATIC RAM High-speed: 10, 12, 15 ns Fully static operation All inputs and outputs directly TTL compatible Three state outputs

Contextual Info: M OSEL V I T E L I C • Packages - 32-pin TSOP - 32-pin 300 mil PDIP - 32-pin 300 mil SOJ - 32-pin 400 mil SOJ Features ■ ■ ■ ■ ■ ■ ■ P R E LIM IN A R Y V61C5181024 128K X 8 STA TIC R A M High-speed: 10, 12, 15, 20 ns Fully static operation

V61C51161024

Contextual Info: MOSEL VITELIC PRELIMINARY V61C51161024 64K x 16 HIGH SPEED STATIC RAM Features Description • ■ ■ ■ ■ ■ The V61C51161024 is a 1,048,576-bit static random-access memory organized as 65,536 words by 16 bits. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with

Contextual Info: M O SEL V ITELIC • Packages - 32-pin TSOP Standard - 32-pin TSOP (Reverse) - 32-pin 300 mil PDIP - 32-pin 300 mil SOJ - 32-pin 400 mil SOJ Features ■ ■ ■ ■ ■ ■ ■ P R E LIM IN A R Y V61C5181024 128K X 8 STA TIC R A M High-speed: 10, 12, 15, 20 ns

Contextual Info: MOSEL V I T E L I C P R E LIM IN A R Y V61C5181024 1 2 8 K X 8 H IG H S P E E D STA TIC R A M • Packages - 32-pin TSOP - 32-pin 300 mil SOJ Features ■ High-speed: 10, 12, 15 ns ■ Fully static operation ■ All inputs and outputs directly TTL compatible

1610241

Contextual Info: MOSEL V I T E L I C PRELIMINARY V61C51161024 64K x 16 HIGH SPEED STATIC RAM Features Description • ■ ■ ■ ■ ■ The V61C51161024 is a 1,048,576-bit static random -access memory organized as 65,536 words by 16 bits. Inputs and three-state outputs are

Contextual Info: M O S E L V IT E L IC PRELIMINARY V61C518256 3 2 K X 8 HIGH SPEED STATIC RAM Features Description • High-speed: 10, 12, 15, 20 ns ■ Low Power Dissipation: - CMOS Standby: 0.5 mA Max. ■ Fully static operation ■ All inputs and outputs directly compatible

Contextual Info: M OSEL V I T E L I C PRELIMINARY V61C518256 3 2 K X 8 HIGH SPEED STATIC RAM Features Description • High-speed: 10, 12, 15 ns ■ Low Power Dissipation: - CMOS Standby: 0.5 mA Max. ■ Fully static operation ■ All inputs and outputs directly compatible

Contextual Info: M OSEL V I T E L I C • Packages - 32-pin TSOP - 32-pin 300 mil SOJ Features ■ ■ ■ ■ ■ ■ ■ PRELIMINARY V61C5181024 128K X 8 H IG H SPEED STA TIC R A M High-speed: 10, 12, 15 ns Fully static operation All inputs and outputs directly TTL compatible

Mosel Vitelic

Abstract: 518256 V61C518256 Mosel Vitelic sram 32k 518256-07
Contextual Info: PRELIMINARY V61C518256 32K X 8 HIGH SPEED STATIC RAM MOSEL VITELIC Features Description • High-speed: 10, 12, 15 ns ■ Low Power Dissipation: – CMOS Standby: 0.5 mA Max. ■ Fully static operation ■ All inputs and outputs directly compatible ■ Three state outputs

a2105

Contextual Info: MOSEL VI TEL IC PRELIMINARY V61C518256 32K X 8 HIGH SPEED STATIC RAM Features Description • High-speed: 10, 12, 15 ns ■ Low Power Dissipation: - CMOS Standby: 0.5 mA Max. ■ Fully static operation ■ All inputs and outputs directly compatible ■ Three state outputs

Contextual Info: M O S E L V IT E L IC PRELIMINARY V61C51161024 6 4 K x 16 STATIC RAM Features Description • ■ ■ ■ ■ The V 61C 51161024 is a 1,048,576-bit static random -access memory organized as 65,536 words by 16 bits. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with

Contextual Info: M O SE L V I T E L I C • Packages - 44-pin TSOP - 44-pin 400 mil SOJ Features ■ ■ ■ ■ ■ ■ ■ P R E LIM IN A R Y V61C 51164096 2 5 6K X 16 H IG H SPEED STA TIC R A M High-speed: 15, 20, 25 ns Fully static operation All inputs and outputs directly TTL compatible

ATPA

Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C

SA15Y

Abstract: CY7C199-15VC v62c518256-35f CY7C199-35VC AS7C256-15 CY7C199-12VC IS61C3216-15T LAN91C100FD W24257AJ-12 V62C518256L-25R
Contextual Info: AN 8.10 LAN91C100FD Rev. B/LAN91C110 Rev. A Min. SRAM Access Time Requirement & a List of Recommended SRAMs 1 Introduction The LAN91C100FD Rev. B/LAN91C110 Rev. A Ethernet Controllers utilize external SRAM to store and forward Ethernet packets to and from the Host. The LAN91C100FD Rev. B/LAN91C110 Rev. A were

EPM5128LC

Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2148-35C CY21L48-35C CY7C168A-35C CY7C168A-25C 5962-8871309XX 5962-89839112X CY2148-35C CY7C148-35C CY7C168A-45M CY7C168A-35M+ 5962-8871310RX 5962-8983913RX CY2148-35M CY7C148-35M CY7C169A-35C

Contextual Info: M OSEL V I T E L I C • Packages - 44-pin TSOP - 44-pin 400 mil SOJ Features ■ ■ ■ ■ ■ ■ ■ P R E LIM IN A R Y V61C 51164096 2 5 6K X 16 H IG H SPEED STA TIC R A M High-speed: 15, 20, 25 ns Fully static operation All inputs and outputs directly TTL compatible

Contextual Info: M OSEL V I T E L I C PRELIMINARY V 6 1 C 5 1 161024 6 4 K x 16 H IG H S P E E D S T A T IC R A M Features Description • ■ ■ ■ ■ ■ The V 61C 51161024 is a 1,048,576-bit static random -access memory organized as 65,536 words by 16 bits. Inputs and three-state outputs are

mn4117405

Abstract: NN5118165 XL93LC46AP NN514265 MS6264L-10PC w24M257 NN514265A w24m257ak-15 HY62256ALP10 mhs p80c51
Contextual Info: ISSI CROSS REFERENCE GUIDE Integrated Silicon Solution, Inc. ISSI ® Integrated Silicon Solution, Inc. CROSS REFERENCE GUIDE SRAM DRAM EEPROM EPROM MICROCONTROLLER JUNE 1999 Integrated Silicon Solution, Inc. CP005-1F 6/1/99 1 ISSI CROSS REFERENCE GUIDE

Contextual Info: M O SE L V I T E L I C • Packages - 44-pin TSOP - 44-pin 400 mil SOJ Features ■ ■ ■ ■ ■ ■ ■ P R E LIM IN A R Y V61C 51164096 25 6K X 16 H IG H SPEED STA TIC R A M High-speed: 15, 20, 25 ns Fully static operation All inputs and outputs directly TTL compatible

EPM5128LC

Abstract: EPM5128GC epm5064lc-1 EPM5128LC1 59628867809r 5962-8984106LX EPM5128GI 7C19945DMB EPM5130GC-1 5962-8867812rx
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 5962-8753903LX 5962-8753902LX CY21L49-55C CY21L49-45C CY7C281 CY7C281A 5962-8863701LX 5962-8753902LX CY6116A-45C CY6116A-35C CY7C286 CY27H512 5962-8867003LX 5962-8867002LX CY6116A-55C CY6116A-45C

philips diode PH 33J

Abstract: UM61256FK-15 sem 2106 inverter diagram IDT7024L70GB um61256 UM61256ak sram um61256fk15 HIGH VOLTAGE ISOLATION DZ 2101 C5584 IDT74LVC1G07ADY
Contextual Info: QUICKSWITCH PRODUCTS HIGH-SPEED LOW POWER CMOS 10-BIT BUS SWITCHES QS3L384 QS3L2384 FEATURES/BENEFITS DESCRIPTION • • • • • • • • • The QS3L384 and QS3L2384 provide a set of ten high-speed CMOS TTL-compatible bus switches. The low ON resistance of the QS3L384 allows inputs to be connected to outputs without