XO 403 DF Search Results

Contextual Info: EPSON Micro MINI E0C6002 4-bit Single Chip Microcomputer • • • • • E0C6200B Core CPU Low Volta9e and Low Power Built-in LCD Driver Built-in R/F Converter Low Cost Perform ance • DESCRIPTION Micro MINI "E0C6002" is a single chip microcomputer for battery-driven products with 7-segment LCD display.

XO 403 df

Abstract: V3021 BAT17 BAT85 V3020 "BAT17" 24 hour clock INTEL 8088
Contextual Info: R EM MICROELECTRONIC-MARIN SA V3020 Ultra Low Power 1-Bit 32 kHz RTC Features n n n n n n n n n n n WR or R/W RD or DS CPU Address Decoder Address Bus n Supply current typically 390 nA at 3 V 50 ns access time with 50 pF load capacitance Fully operational from 1.2 V to 5.5 V

V3021

Abstract: Quartz 32768 motorola 24 hour clock INTEL 8088 3N171 BAT17 BAT85 BS107A V3021SO8B intel 8088 memory CX2V-02
Contextual Info: R EM MICROELECTRONIC-MARIN SA V3021 Ultra Low Power 1-Bit 32 kHz RTC n n n n n n n n n n WR or R/W CPU Address Decoder ADDRESS BUS n Supply current typically 800 nA at 3 V 50 ns access time with 50 pF load capacitance Fully operational from 2.0 V to 5.5 V

00E35

Abstract: 7217l20
Contextual Info: 16 X 16 PARALLEL CMOS MULTIPLIERS IDT7216L IDT7217L Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • 1 6 x 1 6 parallel m u ltip lie r with do uble precision product 16ns clocked m u ltip ly tim e Lo w po w e r con sum ptio n: 120m A •

Contextual Info: V’hM w:&*f H Advanced Micro High Density First-In First-Out FIFO 512x9-Bit CMOS Memory Devices Am7201 DISTINCTIVE CHARACTERISTICS • Low power consumption • RAM based FIFO • 512x9 organization • Status flags - full, half-full, empty • Cycle times of 35/45/65/80/100 nanoseconds

GG2Q

Abstract: Dt7210
Contextual Info: CMOS PARALLEL-SERIAL FIFO 2048 X 9, 4096 x 9 IDT72103 IDT72104 Integrated D evice Technology, Inc. FEATURES: APPLICATIONS: • • • • • • • • • • • • • • • • • • • • 35ns parallel port access time, 45ns cycle time 50MHz serial input/output frequency

1603 LCD

Abstract: POWER COMMAND HM 1211 JTMP0350-0011S vcr 14d 39 ok
Contextual Info: TOSHIBA JTMP03 50-0011S TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC JTMP0350-001 1 S LSI FOR LCD WATCHES The JTMP0350-0011S is a low-power LSI for watches with chronograph functions. This LSI features a chronograph, lap memory, an alarm function, and a built-in LCD driver.

Contextual Info: IBM2520L8767 Preliminary ATM Resource Manager Features other uses DRAM devices. A single array of memory can be used in systems whose sus­ tained full-duplex total bandwidth requirement is less than 102Mb/s. • Optimized for server applications. • Configurable for sustained performance of up to

BC 248

Abstract: addco 722 PPC440 PPC440x4 IVOR0-IVOR15 ivor TBU31 icbt 404
Contextual Info: Title Page PPC440x4 CPU Core User’s Manual SA14-2523-03 July 15, 2003 Copyright and Disclaimer Copyright International Business Machines Corporation 2003 All Rights Reserved Printed in the United States of America July 2003 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or

9745R

Abstract: encoder litton 9400F NTE 3055 lg 6154
Contextual Info: 80C25 , AutoDUPLEX “ CMOS Ethernet Interface Adapter in 28L Package T e c h n o lo g y , In c o rp o ra te d PRELIMINARY October 1994 SEEQ AutoDUPLEX Designation Symbol indentifies product AutoDUPLEX device. • Provides AutoDUPLEXru Detect Function for

tny 226

Abstract: TNY 227 tny 604 C62XX M140 M141 M142 M143 SPRA444 TMS320
Contextual Info: Implementing V.32bis Viterbi Decoding on the TMS320C62xx DSP APPLICATION REPORT: SPRA444 Henry Yiu Customer Applications Center Texas Instruments Hong Kong Ltd. Digital Signal Processing Solutions April 1998 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any

tny 176

Abstract: tny 176/177 tny 177 SK 782 SK 863 TNY 264 equivalent TNY 246 tny 690 sk 473 tny 66
Contextual Info: Implementing V.32bis Viterbi Decoding on the TMS320C62xx DSP APPLICATION REPORT: SPRA444 Henry Yiu Customer Applications Center Texas Instruments Hong Kong Ltd. Digital Signal Processing Solutions April 1998 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any

87CM40A

Abstract: TMP87C840F TMP87C840N TMP87CC40F TMP87CC40N TMP87CH40F TMP87CH40N TMP87CK40AF TMP87CK40AN TMP87CM40AF
Contextual Info: TOSHIBA TM P87 C840/C40/H 40/K40 A/M 40 A CMOS 8 b f ' y h V ' f ? n = l > h n - 7 TMP87C840N, TM P87C840F, TMP87CC40N, TMP87CC40F, A ^ iR O M , RAM, A tti* TMP87CH40N, TMP87CH40F, TMP87CK40AN, TMP87CK40AF, TMP87CM40AN TMP87CM40AF - h, ^ 7 ^ hA/Dn > ¿T& F*IÉS L tz ÜïiÉ, Ü$ltÈ8 fcf y h v > ? V ^ y 7° v >f * n a y tf a. - ? t

Contextual Info: Philips Sem iconductors Data Com m unications Products Prelim inary specification Octal universal asynchronous receiver/transmitter UART DESCRIPTION SC26C198 • Sixteen byte receiver FIFO s for each UART The Philips 2 6 C 198 Octal UART is a single chip CMOS-LSI

Contextual Info: 4B2S771 □ D2 b 3 ö i 4 T 7D CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Output Enable OE pin. The FIFOs accept 4-bit or 5-bit data at the data input (Do-D3,4 ). The stored data stack up on a firstin/first-out basis. A Shift Out (SO) signal causes the data at the next to last

API 676 2ED

Abstract: FRB 749 130-082 3D1 951 PowerPC 970 118.076 addco 722 BA 59 04A FP grx 938 CA64
Contextual Info: Book E: Enhanced PowerPC Architecture Version 1.0 May 7, 2002 Third Edition Dec 2001 The following paragraph does not apply to the United Kingdom or any country where such provisions are inconsistent with local law: INTERNATIONAL BUSINESS MACHINES CORPORATION PROVIDES THIS DOCUMENT “AS IS”

PPC440x5

Abstract: BX287
Contextual Info: Title Page PPC440x5 CPU Core User’s Manual Preliminary SA14-2613-03 July 15, 2003 Copyright and Disclaimer Copyright International Business Machines Corporation 2003 All Rights Reserved Printed in the United States of America July 2003 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or

Contextual Info: Deep First-In First-Out FIFO 5 12 x9 CMOS Memory 67C 4501 - 5 0 /6 5 /8 0 Features : — Ordering Information • RAM-based FIFO PART NUMBER DESCRIPTIO N • Cycle times of 65/80/100 nanoseconds 67C 4501-50 N 5 1 2 -w o rd b y 9 -b it FIFO N C om • Asynchronous and simultaneous writes and reads

DFa 809

Abstract: se 617
Contextual Info: 1 1991 Am29C516A/Am29C517 A 16 x 16-Bit CMOS Parallel Multipliers DISTINCTIVE CHARACTERISTICS Output register may be made transparent Am29C516A pin and functionally com patible with CY7C516, WTL1516, IDT7216, MPY016, and Am29516 TTL I/O and single + 5 V supply

powerpc 405

Abstract: embedded powerpc 460 X0600 transistor BCA 308 of 557 powerpc 464 ud18 VHDL CODE FOR PID CONTROLLERS opcode sheet BA 9515
Contextual Info: Title Page PowerPC 405-S Embedded Processor Core User’s Manual Version 1.2 June 16, 2010 Copyright International Business Machines Corporation 2010 Printed in the United States of America June 2010 IBM, the IBM logo, and ibm.com are trademarks or registered trademarks of International Business Machines Corp.,

powerpc 464

Abstract: CPU Intel Celeron D 347 embedded powerpc 460 BCA16 464-H90 IM258 embedded powerpc 440 EA18 EA23 EA24
Contextual Info: Title Page PowerPC 464 H90 Embedded Processor Core User’s Manual October 6, 2010 Copyright and Disclaimer Copyright International Business Machines Corporation 2006, 2010 Printed in the United States of America October 2010 IBM, the IBM logo, and ibm.com are trademarks or registered trademarks of International Business Machines Corp.,

8051 Read Write for 80c188

Abstract: 68HC11 80C188 I960 TS16 XRT84V24 XRT84V24IV-208 E1 frame FSRC
Contextual Info: áç XRT84V24 PRELIMINARY QUAD E1 FRAMER IC JUNE 2001 REV. P1.0.4 GENERAL DESCRIPTION • Contains two 96 byte Transmit HDLC Buffers and two 96 byte Receive HDLC buffers for each channel The XRT84V24 Quad E1 Framer contains four independent E1 Framer blocks. Each E1 Framer block

PPC440x6

Abstract: CPU Intel Celeron D 347 embedded powerpc 440x6 datasheet powerpc 460 intel pentium II processor WS425 embedded powerpc 440x6 RS-359 CU-08 IM-248
Contextual Info: Title Page PowerPC 440x6 Embedded Processor Core User’s Manual September 29, 2010 Copyright and Disclaimer Copyright International Business Machines Corporation 2006, 2010 Printed in the United States of America September 2010 IBM, the IBM logo, and ibm.com are trademarks or registered trademarks of International Business Machines Corp.,

VQB71

Abstract: vqb 71 Halbleiterbauelemente DDR "halbleiterwerk frankfurt" U105D diode sy-250 U107D u311d hfo frankfurt sy 170
Contextual Info: eiecrronic Halbleiter-Bauelemente D ie v o r lie g e n d e Ü b e rs ic h t e n t h ä l t i n g e d rä n g te r Form d ie w ic h tig s te n G renz- und K enndaten d e r i n d e r DDR g e f e r t i g t e n H a lb le ite r b a u e le m e n te . D ie K ennw erte werden im a llg e m e in e n f ü r e in e U m gebungstem peratur von