168PLN Search Results

cq60

Contextual Info: HYM71V8655AT6 8Mx64, 8Mx16 based, PC100 DESCRIPTION The H ynix HYM 71V8655AT6 Series are 8M x64bits Synchronous DRAM M odules. The m odules are com posed o f four 8M x16bits CM OS Synchronous DRAM s in 400m il 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TS SO P package on a 168pln glass-epoxy

Contextual Info: TM4EN64KPU, TM4EN64NPU 4194304 BY 64-BIT TM8EN64KPU, TM8EN64NPU 8388608 BY 64-BIT EXTENDED-DATA-OUT DYNAMIC RAM MODULES SMMS692 - AUGUST 1997 Organization - TM4EN64xPU-xx . , . 4194304 x 64 Bits - TM8EN64xPU-xx . . . 8388608 x 64 Bits

Contextual Info: r a iO M O G O M V Military ì860tm 64-Bit M icro p ro cesso r • Compatible with Industry Standards — ANSI/IEEE Standard 754-1985 for Binary Floating-Point Arithmetic — 386 /j 486TM Microprocessor Data Formats and Page Table Entries ■ Parallel Architecture that Supports Up

Contextual Info: PRELIMINARY a Enhanced Am486 Microprocessor Family Advanced Micro Devices DISTINCTIVE CHARACTERISTICS Complete 32-Bit Architecture • High-Performance Design — Improved cache structure supports industrystandard write-back cache — Frequent instructions execute in one clock

Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79C830A FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Pointers to claim and beacon frames ■ Buffer-memory clock frequency range:

gi 9644 diode

Abstract: INTELDX4 write-through
Contextual Info: in te i, MILITARY Intel 486 PROCESSOR FAMILY • Write-Back Enhanced ln t e l D X 4 ™ Processor — Up to 100-MHz Operation -Speed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Write-Back Cache — Integrated Floating-Point Unit

diodo sl r7

Abstract: TMs 1122 NL BC 1305 pin outs DIODO 6N c11 cpl 100 39p HBT 01 - 04G Intel486TM PROCESSOR FAMILY 6M91 INTEL I486 DX2 diodo s4 6n
Contextual Info: intei MILITARY ln t e l 486 TM PROCESSOR FAMILY • lntelDX4TM Processor — Up to 100-MHz Operation -S peed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant

27248

Abstract: 80960HT
Contextual Info: ADVANCE INFORMATION in te i 80960H A/H D/HT 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR • ■ ■ 32-Bit Parallel Architecture — Load/Store Architecture — Sixteen 32-Blt Global Registers — Sixteen 32-Bit Local Registers — 1.2 Gbyte Internal Bandwidth 75 MHz

HY57V168

Abstract: hy57v168010b hym7v64200 hy57v168010a HYM7V64400 HYM7V64400TFG PC100 HYM7V65400 HYM7V64200TFG pc66
Contextual Info: •HYUN DAI Sync. DRAM MODULE - 1 TYPE 168Pin DIMM SIZE 8MB DESCRIPTION 1M X 64 Sync. Unbuffered 16MB 2M X 64 Sync. X HYM7V64200BTRG HYM7V64200TFG HYM7V64200BTFG HYM7V65200CLTFG 72 Sync., ECC HYM7V72A2Q0TFG HYM7V72A200BTFG HYM7V75A2Ö0CLTFG 64 Sync. HYM7V64400TKG

Contextual Info: Preliminary KMM377S1723T1 SDRAM MODULE KMM377S1723T1 SDRAM DIMM Intel 1.0 ver. Base 16Mx72 SDRAM DIMM with PLL & Register based on 16Mx8, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S1723T1 is a 16M bit x 72 Synchro­

km48s2020ct

Abstract: S823B 4MX16 54-PIN u108h KM48S2020 44s16030
Contextual Info: General Information CMOS DRAM A. Product Guide Component Density 16M 4th Part Number Org. KM44S4020CT 4Mx4 KM48S2020CT 2Mx8 KM416S1020CT 1Mx16 KM416S1021CT Speed G F *2 Package Avail. (TSOPII) LVTTL 4K 3.3 ±0.3 S/t-P/L/IO 8/H/L/10 44pin C/S c/s 2 Banks

Contextual Info: SIEMENS 3.3V 1M x 64-Bit SDRAM Module 3.3V 1M x 72-Bit SDRAM Module HYS64V1000GU HYS72V1000GU 168 pin unbuffered DIMM Modules Preliminary Information • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module • 1 bank 1M x 64, 1M x 72 organisation

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT MC-421000AA64FA 1 M-WORD BY 64-BIT DYNAMIC RAM MODULE FAST PAGE MODE D escription The MC-421000AA64FA is a 1,048,576 words by 64 bits dynam ic RAM m odule on w hich 16 pieces o f 4 M DRAM: ¿iPD424400 are assembled. This m odule provides high density and large quantities o f m em ory in a sm all space w ith o u t u tilizing the

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT MC-422000AA64 2 M-WORD BY 64-BIT DYNAMIC RAM MODULE FAST PAGE MODE Description The MC-422000AA64 is a 2,097,152 words by 64 bits dynamic RAM module on which 8 pieces of 16 M DRAM: JUPD4218160 are assembled. This module provides high density and large quantities of memory in a small space without utilizing the surfacemounting technology on the printed circuit board.

Contextual Info: TM4EP64BJN, TM4EP64BPN, TM4EP64CJN, TM4EP64CPN 4194304 BY 64-BIT TM4EP72BJN, TM4EP72BPN, TM4EP72CJN, TM4EP72CPN 4194304 BY 72-BIT EXTENDED-DATA-OUT DYNAMIC RAM MODULES _ • • • • SMMS682A-AUGUST 1997-REVISED MARCH 1998 Organization

XK power 22E

Abstract: slb 9635 tt 1.2 SLB 9635 TMs 1122 NL CU 212 SLB 9635 TT INTELDX4 write-through intel DX4 WHAT IS 485 PROTOCOL Intel486
Contextual Info: intei MILITARY l n t e l 486 TM PROCESSOR FAMILY • lntelDX4TM Processor — Up to 100-MHz Operation — Speed-Multiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant

SIMM 1Mx9 30pin

Abstract: simm EDO 72pin KMM51442100ATG KMM532
Contextual Info: I. DRAM MODULE Product Guide Org. Part No. Feature Access Time ns Package Height s.single/didouble (mil) Refresh (cycle/ms) CIS 1024/16 1024/120 1024/16 1024/120 1024/16 1024/16 1024/16 1024/16 now now now now now now now now 1024/16 1024/16 1024/16 1024/16

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT MC-422000AA64 2 M-WORD BY 64-BIT DYNAMIC RAM MODULE FAST PAGE MODE D escription The M C-422000AA64 is a 2,097,152 words by 64 bits dynam ic RAM m odule on which 8 pieces of 16 M DRAM: //P D 4218160 are assem bled. This m odule provides high density and large quantities of memory in a sm all space w ithout utilizing the surfacem ounting technology on the printed circuit board.

Contextual Info: M W Ä K K S B O M F iS ra E fflÄ T T O !» 80960CF-40 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR • Socket and Object Code Compatible with 80960CA • Two Instructions/Clock Sustained Execution • Four 71 Mbytes/s DMA Channels with Data Chaining

242202

Abstract: a1768 a80486dx2 VME 5v 3.3v timing sequence 241618 Intel overdrive
Contextual Info: intei EMBEDDED ln te lD X 2 T M Integrated Floating-Point Unit Speed-Multiplying Technology PROCESSOR Data Bus Parity Generation and Checking 32-Bit RISC Technology Core Boundary Scan JTAG 8-Kbyte Write-Through Cache 3.3V Processor, 50 MHz, 25 MHz CLK — 208-Lead Shrink Quad Flat Pack

AM486

Abstract: 80486DX amd 17852 80486dx memory interfacing 8086 microprocessor pin diagram Micro Linear application note 33 80486DX architecture A80486dx CACHE MEMORY FOR 8086
Contextual Info: bSE D 0257525 G044234 PRELIMINARY 14T An d i ADVANCED MICRO DEVI CES- Am486 DX Advanced Micro Devices High-Performance, 32-Bit Microprocessor DISTINCTIVE CHARACTERISTICS • Binary Com patible with Large Software Base — M S-DOS, OS/2, Windows — UNIX, W indows NT

PC133-333-520R

Contextual Info: SIEMENS 3.3V 168 pin Registered SDRAM Modules HYS72V16200GR-7.5 • 168 Pin Registered 8 Byte Dual-ln-Line SDRAM Module for PC and Server main memory applications • One bank 16M x 72 organisation • Optimized for ECC applications with very low input capacitances

Contextual Info: 80960HA/HD/HT 1.0 ABOUT THIS DOCUMENT This document provides a preview of Intel’s 80960Hx embedded superscalar microprocessors. Future revisions of this document will provide targeted electrical characteristics. Detailed descriptions for functional topics — other than parametric perfor­

TI486

Abstract: ti486dx2 tx486 TI486DX TI486DX2-G66
Contextual Info: PC SYSTEMS PRODUCTS TI486DX2-G66, TI486DX2-G80 MICROPROCESSORS SRZS006 — MAY 1995 • • 486DX Architecture and Performance —486-Compatible Instruction Set and