20P1N Search Results

M74HC244

Abstract: M74HC244-1P 4000B 74LS244 M74HC244-1FP eaya 150MIL diode 1fp
Contextual Info: MITSUBISHI <DIGITAL ASSP> M 7 4H C 2 4 4-1P /F P OCTAL 3-STATE NONINVERTING B U FFE R /LIN E D R IVER /LIN E RECEIVER DESCRIPTION T h e M 7 4 H C 2 4 4 -1 is an in teg ra te d circuit chip consisting of PIN CONFIGURATION TOP VIEW tw o blocks of 3 -s ta te noninverting buffers with four in d e ­

Contextual Info: M IT S U B IS H I <DIGITAL ASSP> M 74HC240-1P/FP OCTAL 3-S T A T E IN V E R TIN G B U F F E R /L IN E D R IV E R /L IN E R E C E IV E R DESCRIPTION T h e M 7 4 H C 2 4 0 -1 is a n in te g r a te d c irc u it c h ip c o n s is tin g of PIN CONFIGURATION TOP VIEW

74HC259

Contextual Info: M IT S U B IS H I HIGH S P E E D C M O S M74HC259P/FP/DP 8 -B IT A D D R E S S A B L E L A T C H /l-O F -8 D E C O D E R DESCRIPTION PIN The M 74H C 259 is a sem ico nductor integrated circuit con­ CONFIGURATION TOP VIEW sisting of eigh t latches and a de m u ltip le xe r w hich d e s ig ­

Contextual Info: M ITSU B ISH I HIGH S P E E D CMOS M 74H C 688P/FP/D W P 8-BIT E Q U A L I T Y CO M P A R A T O R DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74H C 688 is a sem iconductor integrated circuit con­ sisting of an 8 -b it d igital com parator w ith a cascade input.

74hc283 pin configuration

Abstract: 283P CMOS Full Adder
Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M 74H C 283P /F P /D P 4 -B IT BINARY F U L L ADDER W ITH F A S T CARRY DESCRIPTION T h e M 7 4 H C 2 8 3 is a sem iconductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW sisting of a 4 -b it full ad d e r. OUTPUT

BCD counter

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M74HC162P/FP/DP P R E S E T T A B L E BCD COUNTER W ITH SYNCHRONOUS R E S E T DESCRIPTION T h e M 7 4 H C 1 6 2 is a sem iconductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW sisting of a p re s e tta b le synchronous B C D counter with a

diod Er 302

Contextual Info: M ITSU B ISH I HIGH SPEED CMOS M 74H C 40 40P /F P /D P t ir i ' t , X^ C cV»^*»W ' • < Au t '" s &te „.ta ” " 12-STAGE BINARY R IP P L E COUNTER DESCRIPTION T he M 7 4 H C 4 0 4 0 is a sem ico nd u cto r integrated circuit co n ­ PIN CONFIGURATION TOP VIEW

245-1P

Abstract: 74hc245-1
Contextual Info: M IT S U B IS H I <DIGITAL ASSP> M 7 4H C 2 4 5 -1P /F P OCTAL 3-S TA T E N O N IN VERTIN G BUS T R A N S C E IV E R DESCRIPTION The M 74HC245-1 is an integrated c irc u it chip consisting of PIN CONFIGURATION TOP VIEW eig h t tra nsceivers w ith no ninverted outputs.

Contextual Info: M IT S U B IS H I <DIGITAL ASSP> M 7 4 H C T 5 3 3 - 1 P /F P OCTAL 3-S TA T E IN V E R TIN G D -T Y P E TR A N S PA R E N T LATCH W IT H L S T T L -C O M P A T IB L E IN P U T S DESCRIPTION T h e M 7 4 H C T 5 3 3 -1 is an in teg rated circuit chip consisting

4049bf

Abstract: cmos 4049B 4049bp
Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M 74H C 4049B P /F P /D P HEX IN V E R TIN G B U F F E R /L O G IC -L E V E L DOWN CO N VERTER DESCRIPTION The M 74H C 4049B is a sem iconductor in teg rated PIN CONFIGURATION TOP VIEW circuit consisting of 6 built-in b u ffer/c o n ve rte r circuits with invert­

74ls238

Abstract: 74hc238p of 74LS238 74LSTTL
Contextual Info: MITSUBISHI HIGH SPEED CMOS & X0' M 74H C 238P /F P /D P c l-O F -8 DECO D ER/DEM ULTIPLEXER Vit»1" DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74H C 238 is a sem iconductor integrated circuit con­ sisting of a 3 -b it binary-to-octal d e c o d e r/d e m u ltip le x e r with

74hc190p

Abstract: c190p M74HC190P
Contextual Info: MITSUBISHI HIGH S P E E D CMOS M 74H C 190P /FP /D P So'-' cUxC ^ P R E S E T T A B L E BCD U P/DO W N COUNTER DESCRIPTION T h e M 7 4 H C 1 9 0 is a s e m ic o n d u c to r in te g ra te d c irc u it c o n ­ s is tin g of a p re s e tta b le s y n c h ro n o u s

74HC266A

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M 74H C 266A P/ F P / DP Q UADRUPLE 2 -IN P U T E X C L U S IV E NOR GATE W IT H OPEN-DRAIN O U TPU TS DESCRIPTION T he M 74H C 266A is a sem iconductor integrated c irc u it con- PIN CONFIGURATION TOP VIEW siting of four 2-input exclusive NOR gates w ith open-drain

Contextual Info: M IT S U B IS H I <DIGITAL ASSP> M 74H C 640-1P /F P OCTAL 3-S TA T E IN V E R TIN G BUS T R A N S C E IV E R DESCRIPTION The M 74HC640-1 is an inte grated circu it chip consisting of PIN CONFIGURATION TOP VIEW eig h t bus transceivers w ith inverted outputs.

Contextual Info: MITSUBISHI <DIGITAL ASSP> M 74H C 138-1P /FP l-OF-8 D ECO D ER/D EM U LTIPLEXER DESCRIPTION T h e M 7 4 H C 1 3 8 -1 is a sem iconductor in teg ra te d circuit con­ PIN CONFIGURATION TOP VIEW sisting of a 3 -b it binary to 8 -lin e d e c o d e r/d e m u ltip le x e r with

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M74HC4024P/FP/DP 7-STAGE BINARY R IP P L E COUNTER DESCRIPTION T h e M 7 4 H C 4 0 2 4 is a sem iconductor in teg rated circuit con­ sisting of an asynchronous 7 -s ta g e PIN CONFIGURATION TOP VIEW binary counter with

74HC299P

Contextual Info: M ITSU B ISH I HIGH SPEED CMOS M74HC299P/FP/DWP l 8 -B IT B ID IR E C T IO N A L U N IV E R S A L S H IF T R E G IS T E R W IT H 3-S TA T E P A R A L LE L O U TPU TS DESCRIPTION T h e M 7 4 H C 2 9 9 is a sem iconductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW

74HC4022P

Abstract: 74HC4022
Contextual Info: M IT S U B IS H I HIGH SPEED CMOS u v a • '0''S &TC & V M 74HC4022P/FP/DP ‘" O CTAL C O U N T E R /D IV ID E R DESCRIPTION T h e M 7 4 H C 4 0 2 2 is a sem ico nductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW sisting of an octal counter with reset input and d e c o d e

FUNCTIONAL APPLICATION OF 74LS148

Abstract: pin diagram of ic 74ls148 HD7x
Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M 74H C 148P /FP /D P 8 -L IN E TO 3 -L IN E P R IO R IT Y ENCODER DESCRIPTION T h e M 7 4 H C 1 4 8 is a sem iconductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW sisting of an 8 -lin e binary octal e n c o d e r with priority.

Contextual Info: MITSUBISHI HIGH SPEED CMOS M74HC365P/FP/DP HEX 3-STA TE NONINVERTING B U F F E R WITH COMMON E N A B LE S D E S C R IP T IO N T he M 7 4 H C 3 6 5 is a sem ico nd u cto r integrated circu it co n ­ PIN C O N F IG U R A T IO N TO P VIEW sistin g of six buffers with 3-state noninverted outputs and

4511D

Contextual Info: MITSUBISHI HIGH SPEED CMOS Ä ’' ^ M 74H C 4511P /FP /D P BCD-TO S E V E N -S E G M E N T L A T C H /D E C O D E R /D IS P L A Y D R IVER D E S C R IP T IO N T h e M 7 4 H C 4 5 1 1 is a sem iconductor in teg rated circuit con­ P IN C O N F IG U R A T IO N

M74HC541P

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M74HC541P/FP/DWP OCTAL 3-S TA T E N O N IN VERTIN G B U F F E R /L IN E D R IV E R /L IN E R E C EIVER DESCRIPTION T h e M 7 4 H C 5 4 1 is a sem iconductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW sisting of 3 -s ta te non-inverting buffers each with eight in d e ­

Contextual Info: MITSUBISHI HIGH SPEED CMOS M74HC113P/FP/DP DUAL I -K F L IP -F L O P WITH S E T DESCRIPTION T he M 7 4 H C 1 1 3 is a sem ico n d u cto r integrated circu it co n ­ PIN CON FIGURATIO N TOP VIEW sistin g of of tw o n e g a tiv e -e d g e trig g ered J - K flip flops with

Contextual Info: MAXIM I N T E G R A T E » P R O D U C T S b2E D Sô7bbSl DG07G45 105 IMXM 19-0054; RevO; 9/92 CMOS, TTL-C om patible A nalog S w itch es 1.1 This specification covers the detail requirements for four C M O S switches with three switch configu­ rations SPST, SPDT, and DPST . These circuits are processed in accordance with MIL-STD-883