4MX4BANKX16 Search Results

Contextual Info: Preliminary 256MBit MOBILE SDR SDRAMs based on 4Mx4Bankx16 I/O DESCRIPTION The Hynix Mobile SDR is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, handheld PCs.

Contextual Info: EM48AM1684VTG Revision History Revision 0.1 Jun. 2010 - First release. - Jun. 2010 1/20 www.eorex.com EM48AM1684VTG 256Mb (4Mx4Bank×16) Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge The EM48AM1684VTG is Synchronous Dynamic

EM48AM1684VTB

Abstract: EM48AM1684VTB-75F EM48AM1684VTB-75FE EM48AM1684VTB-7F
Contextual Info: eorex EM48AM1684VTB 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 3.3V ±0.3V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

EM48AM1684VTF

Abstract: em48am1684vtf-6f
Contextual Info: eorex EM48AM1684VTF Revision History Revision 0.1 Oct. 2009 - First release. Revision 0.2 (Nov. 2009) - Modify ICC 1~6 by new lot samples. Revision 0.3 (Nov. 2009) - Modify ICC2P &ICC6 again. Nov. 2009 www.eorex.com 1/19 eorex EM48AM1684VTF 256Mb (4Mx4Bank×16) Synchronous DRAM

em48am1684vte

Abstract: CKE 2009
Contextual Info: eorex EM48AM1684VTE Revision History Revision 0.1 Apr. 2008 - First release. Revision 0.2 (Apr. 2009). - modify improved ICCs Apr. 2009 www.eorex.com 1/19 eorex EM48AM1684VTE 256Mb (4Mx4Bank×16) Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge

Contextual Info: EM42AM1684RTC Revision History Revision 0.1 Jul. 2010 - First release. Revision 0.2 (Sep. 2010) - Delete CL=2, page 2, 8, 17 - Add 166MHz@2.5-3-3; 200MHz@3-3-3, page 2 www.eorex.com Sep. 2010 1/21 EM42AM1684RTC 256Mb (4Mx4Bank×16) Double DATA RATE SDRAM

Contextual Info: eorex EM48AM1684LBA Revision History Revision 0.1 Jul. 2006 - First release. Revision 0.2 (Mar. 2009). - Add “E” grade Part No. Mar. 2009 www.eorex.com 1/18 eorex EM48AM1684LBA 256Mb (4Mx4Bank×16) Synchronous DRAM Features Description • • •

Contextual Info: eorex EM48AM1684VTH 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 3.3V ±0.3V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

DDR2-667

Abstract: EM44AM1684LBC EM44AM1684LBC-37F EM44AM1684LBC-3F EM44AM1684LBC-5F BGA84
Contextual Info: eorex EM44AM1684LBC 256Mb 4Mx4Bank×16 Double DATA RATE 2 SDRAM Features Description • JEDEC Standard VDD/VDDQ=1.8V ± 0.1V. • All inputs and outputs are compatible with SSTL_18 interface. • Fully differential clock inputs (CK,/CK) operation. • 4 Banks

EM48AM1684VTC

Abstract: EM48AM1684VTC-75F EM48AM1684VTC-7F
Contextual Info: eorex EM48AM1684VTC 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 3.3V ±0.3V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

EM48AM1684VTA

Abstract: TSOP-54P
Contextual Info: eorex EM48AM1684VTA 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 3.3V ±0.3V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

EM42AM1684RTB

Abstract: CA10 CL25
Contextual Info: eorex EM42AM1684RTB 256Mb 4Mx4Bank×16 Double DATA RATE SDRAM Features Description • Internal Double-Date-Rate architecture with 2 Accesses per clock cycle. • VDD=VDDQ= 2.5V ±0.2V (DDR-333) • VDD=VDDQ= 2.6V ±0.1V (DDR-400) • 2.5V SSTL-2 compatible I/O

EM48AM1684VTD

Contextual Info: eorex EM48AM1684VTD Revision History Revision 0.1 Dec. 2007 - First release. Revision 0.2 (Apr. 2008). - modify improved ICCs - ADD -75 speed Revision 0.3 (Jun. 2009). - Modify/improved extended grade temperature spec. from -25°C~85°C to -30°C ~85°C

EM42AM1684RTC

Contextual Info: EM42AM1684RTC Revision History Revision 0.1 Jul. 2010 - First release. Revision 0.2 (Sep. 2010) - Delete CL=2, page 2, 8, 17 - Add 166MHz@2.5-3-3; 200MHz@3-3-3, page 2 Sep. 2010 www.eorex.com 1/21 EM42AM1684RTC 256Mb (4Mx4Bank×16) Double DATA RATE SDRAM

EM48AM1644VBC

Abstract: EM48AM1644VBC-75F EM48AM1644VBC-75FE
Contextual Info: eorex EM48AM1644VBC Preliminary 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • 2 x 4 banks x 2 Mbit x 16 organisation ( Two 128MBit chips stacked in multi-chip package) • Fully Synchronous to Positive Clock Edge • Single 2.7V ~ 3.6V Power Supply

EM44AM1684LBA

Abstract: DDR2-667 EM44AM1684LBA-37F EM44AM1684LBA-3F EM44AM1684LBA-5F emrs3
Contextual Info: eorex EM44AM1684LBA 256Mb 4Mx4Bank×16 Double DATA RATE 2 SDRAM Features Description • JEDEC Standard VDD/VDDQ=1.8V ± 0.1V. • All inputs and outputs are compatible with SSTL_18 interface. • Fully differential clock inputs (CK,/CK) operation. • 4 Banks

EM48AM1644LBB

Abstract: EM48AM1644LBB-75F EM48AM1644LBB-75FE
Contextual Info: eorex EM48AM1644LBB Preliminary 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • 2 x 4 banks x 2 Mbit x 16 organisation ( Two 128MBit chips stacked in multi-chip package) • Fully Synchronous to Positive Clock Edge • Single 1.8V ±0.1V Power Supply

EM48AM1684VBD

Contextual Info: eorex Preliminary EM48AM1684VBD 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 2.7V ~ 3.6V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

Contextual Info: 12314 EM48AM1684VTH 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 3.3V ±0.3V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

Contextual Info: eorex EM48AM1684VBE 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • • • • The EM48AM1684VBE is Synchronous Dynamic Random Access Memory (SDRAM) organized as 4Meg words x 4 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of

EM48AM1684LBA

Abstract: EM48AM1684LBA-75F BSTH
Contextual Info: eorex EM48AM1684LBA 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • VDD/VDDQ= 1.8V +/- 0.15V Power Supply • LVCMOS Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

EM42AM1684RTA

Abstract: EM42AM1684RTA-75F CA10 CL25 EM42AM1684RTA-5F EM42AM1684RTA-6F
Contextual Info: eorex EM42AM1684RTA 256Mb 4Mx4Bank×16 Double DATA RATE SDRAM Features Description • Internal Double-Date-Rate architecture with 2 Accesses per clock cycle. • Single 2.5V ±0.2V Power Supply • 2.5V SSTL-2 compatible I/O • Burst Length (B/L) of 2, 4, 8

EM48AM1684VBA

Abstract: EM48AM1684VBA-75F
Contextual Info: eorex EM48AM1684VBA 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 2.7V ~ 3.6V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

EM48AM1684VBB

Abstract: EM48AM1684VBB-75F EM48AM1684VBB-75FE
Contextual Info: eorex EM48AM1684VBB 256Mb 4Mx4Bank×16 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 2.7V ~ 3.6V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8