54LS56 Search Results

Contextual Info: M M O TO RO LA M ilitary 54LS569 B in a r y U p / D o w n C o u n t e r W it h 3 - S t a t e O u t p u t s ELECTRICALLY TESTED PER: 54LS569 T h e 5 4 L S 5 6 9 is d e s ig n e d a s a p r o g r a m m a b le u p / d o w n B in a r y cou nte r. T h is d e v ic e h a s 3 -sta te o u t p u t s fo r u s e in b u s o r g a n iz e d s y s t e m s . W it h

74LS56

Abstract: 74ls57 54LS56
Contextual Info: SN 54LS56, SN 54LS57, SN 74LS56, SN 74LS57 FREQUENCY DIVIDERS DECEMBER 1 9 8 3 -R E V lS E D M ARCH 1988 'LS56 Performs 50 to 1 Frequency Division 5 to 1, 5 to 1, and 10 to 1 SN 54LS56, SN54LS57 . . . JG P A C K A G E S N 74LS56, SN 74LS57 . . . J G O R P P A C K A G E

74LS115

Abstract: 74LS273 74LS189 equivalent 74LS00 QUAD 2-INPUT NAND GATE 74LS265 fan-in and fan out of 7486 74LS93A 74LS181 74LS247 replacement MR 31 relay
Contextual Info: F A IR C H IL D LOW POWER S C H O T T K Y D A TA BOOK ERRATA SHEET 1977 Device Page Item Schematic 2-5 Figure 2-6. Blocking diode in upper right is reversed. Also, diode con­ necting first darlington emitter to output should have series resistor. LS33 5-25

54LS641

Abstract: CD Octal D-type flip-flop 74LS00 QUAD 2-INPUT NAND GATE 54LS642 54LS154 74LS00 quad TTL nand gate 74ls00 NAND gate SchottkyBarrierDiode 54LS92 54LS623
Contextual Info: MAXIMUM RATINGS Supply Voltage - Vcc T h e S e rie s 5 4 L S /7 4 L S Schottky TTL family features both Schottky-barrier-diode inputs and em itte r inputs and u tilizes full Schottky-barrier-diode clamping to achieve speeds com parable to Series 54/74 at one-fifth of the

LS574

Abstract: 74ls564 54LS564FM z 0607 54LS564DM 74LS564DC 74LS564FC 74LS564PC LS374
Contextual Info: 564 I 54LS/74LS564 D ii 7 C O N N E C T IO N D IAG RAM P IN O U T A O C TA L D -TYPE FLIP-FLO P With 3-S tate Outputs o l[T D E S C R IP T IO N — T he '564 is a hig h speed lo w p o w e r o c ta l flip -flo p w ith a b u ffe re d c o m m o n C lo c k (CP) and a b u ffe re d c o m m o n O u tp u t E nable (OE).

74LS564DC

Contextual Info: 564 CO NNECTION DIAGRAM I 54LS/74LS564 Oit P IN O U T A 7 OCTAL D-TYPE FLIP-FLOP With 3 -S tate Outputs c5e [T 20] V cc Da [7 T5] So D, [7 îë ]ô i d 2 [T D ESC R IPTIO N— The '564 is a high speed low power octal flip -flo p with a buffered com m on Clock (CP) and a buffered com m on O utput Enable (OE).

74LS189 equivalent

Abstract: 74LS200 AmZ8036 Z8104 74LS300 AM9511 Am2505 27s13 54S244 27LS00
Contextual Info: Advanced Micro Devices Condensed Catalog 1981 Advanced Micro Devices, Inc. Advanced Micro Devices reserves the right to make changes in its products without notice in order to improve design or performance characteristics. The company assumes no responsibility for the use of any circuits described herein.

UAA2001

Abstract: MC8500 micromodule m68mm19 1N9388 74ALS643 2N6058 MC145026 2N5160 MOTOROLA MC3340 equivalent pn3402
Contextual Info: MOTOROLA Semiconductors THE EUROPEAN MASTER SELECTION 1982 The total num ber of standard Sem iconductor products available from M otorola ex­ ceeds 15 0 0 0 device types. To most of our custom ers this total presents an overw helm ing choice. The European Master Selection lists approxim ately 4 0 0 0 preferred devices that re­

74LS547

Abstract: 74ls652 74LS654 74LS245 latch 74LS648 74LS651 54LS547 74ls546 74LS567 74LS647
Contextual Info: Tabi« of Contento DOUBLE-DENSITY PLUS INTERFACE Contents for Section 12 . Double-Density PLU S Selection Guide . Small But Mighty; New Components Give You More Logic in Less Chips .

LS-573

Abstract: LS573 74LS563DC 74LS563FC LS373 54LS563DM 54LS563FM 74LS563PC
Contextual Info: 5 Ö 3 563 / 7 54LS/74LS563 CONNECTION DIAGRAM PINOUT A £>/,// jä OCTAL D-TYPE LATCH With 3-State Outputs ¡>5 ^ c IPI 1.0 m ^ Th 563 'S a h'9h speed octal latch wi,h buffered common Latch Enable (LB and buffered common Output Enable <OE) inputs. ^ Stn ♦hir 5J|S fu " ctio n a lly indentical to

Contextual Info: 5t>3 563 7 CONNECTION DIAGRAM P IN O U T A 54LS/74LS563 o i l I P O C TA L D-TYPE LATCH With 3-State Outputs DESCRIPTION— T h e ’563 is a high speed octal latch with buffered com m on Latch Enable ( L B and buffered com m on Output Enable ( O B inputs.

logos 4012B

Abstract: 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
Contextual Info: L p i > « , * S E m Ic O N VOLUM E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 5th EDITION 1985 Revised June 1985 COMPILED AND PUBLISHED BY S E M IC O N IN D E X E S L IM IT E D THE SEMICON INDEX SERIES CONSISTS OF VOLUME 1 TRANSISTOR INDEX VOLUME 2 DIODE & SCR INDEX