74LS56 Search Results

74122

Abstract: 74LS568 TTL 74121 ttl 7497 54LS 96L02 96LS02 96S02 D187 D188
Contextual Info: FAIRCHILD DIGITAL TTL U p/D o w n 54LS 2,/74LS568 Presettable 16 L o g ic /C o n n e c tio n D ia g ra m Power D issipation s s J- _ _ _ D99 9Z 32 20 400 D187' 4L,7B,9B 32 20 325 D188 4L,7B,9B 54LS(2 /74LS569 3 Rate M u ltip lie r 54/7497 M.f./64 — 4 Rate M u ltip lie r

Contextual Info: <8 > M O T O R O L A SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN54/74LS569A is designed as programmable up/down BCD and Binary counters respectively. These devices have 3-state outputs for use in bus organized systems. With the exception of output enable OE and

74LS56

Abstract: 74ls57 54LS56
Contextual Info: SN 54LS56, SN 54LS57, SN 74LS56, SN 74LS57 FREQUENCY DIVIDERS DECEMBER 1 9 8 3 -R E V lS E D M ARCH 1988 'LS56 Performs 50 to 1 Frequency Division 5 to 1, 5 to 1, and 10 to 1 SN 54LS56, SN54LS57 . . . JG P A C K A G E S N 74LS56, SN 74LS57 . . . J G O R P P A C K A G E

74ls547

Abstract: SN74LS547 74LS566 74ls546 SN74LS546 74LS567 ls547 TS56 SN74LS566 SN74LS547NS
Contextual Info: 8-B it Bus Register Transceivers and Latch Transceivers SN54/74LS546 SN54/74LS547 SN54/74LS566 SN54/74LS567 Features/ Benefits Description • Bidirectional transceivers utilizing registers or latches These devices are comprised of a pair of 8-bit registers 'LS546,

74LS568

Abstract: 74L signetics 74LS 74LS568A 74LS569A EN10 N74LS568AN N74LS569AN
Contextual Info: Signetics 74LS568A, 569A 3-State Bidirectional Counters '568A BCD Decade Up/Down Synchronous Counter 3-State '569A 4-Bit Binary Up/Down Synchronous Counter (3-State) Product Specification Logic Products FEATURES TYPICAL fiiax TYPICAL SUPPLY CURRENT (TOTAL)

74ls 8 RS triggers

Abstract: 74LS568 569A diode S68a 74LS 74LS568A 74LS569A D-19 N74LS568AN N74LS569AN
Contextual Info: 74LS568A, 569A Signetics 3-State Bidirectional Counters '568A BCD Decade Up/Down Synchronous Counter 3-State '569A 4-Bit Binary Up/Down Synchronous Counter (3-State) Product Specification Logic Products FEATURES T YP IC A L fMax T YP IC A L SU P P L Y CURRENT

LS574

Abstract: 74ls564 54LS564FM z 0607 54LS564DM 74LS564DC 74LS564FC 74LS564PC LS374
Contextual Info: 564 I 54LS/74LS564 D ii 7 C O N N E C T IO N D IAG RAM P IN O U T A O C TA L D -TYPE FLIP-FLO P With 3-S tate Outputs o l[T D E S C R IP T IO N — T he '564 is a hig h speed lo w p o w e r o c ta l flip -flo p w ith a b u ffe re d c o m m o n C lo c k (CP) and a b u ffe re d c o m m o n O u tp u t E nable (OE).

74LS564DC

Contextual Info: 564 CO NNECTION DIAGRAM I 54LS/74LS564 Oit P IN O U T A 7 OCTAL D-TYPE FLIP-FLOP With 3 -S tate Outputs c5e [T 20] V cc Da [7 T5] So D, [7 îë ]ô i d 2 [T D ESC R IPTIO N— The '564 is a high speed low power octal flip -flo p with a buffered com m on Clock (CP) and a buffered com m on O utput Enable (OE).

ls58

Contextual Info: M MOTOROLA SN54LS/74LS568 SN54LS/74LS569 DESCRIPTION — The SN54LS/74LS568 and SN54LS/74LS569 are designed as p ro g ra m m a b le u p/d ow n BCD and B ina ry counters respectively. These devices have 3-state o utp u ts fo r use in bus organized system s. W ith th e e xception o f o u tp u t enable (OE) and

Contextual Info: M M O T O R O L A SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN 54/74LS 569A is designed as programmable up/down BCD and Binary counters respectively. These devices have 3-state outputs for use in bus organized systems. W ith the exception of output enable (OE) and

74LS568

Contextual Info: g M O T O R O L A SN54LS/74LS568 SN54LS/74LS569 DESCRIPTION — T h e S N 5 4 LS /7 4 LS5 6 8 and S N 5 4 LS /7 4 LS5 6 9 are d esig n e d a s p ro g ram m ab le up/down BCD and B in ary co u n ters re sp e ctive ly. T h e se d e v ice s h ave 3-state outputs fo r u se in bus

S0810

Abstract: 74LS568A
Contextual Info: Signelics 74LS568A, 569A 3-State Bidirectional Counters '568A BCD Decade Up/Down Synchronous Counter 3-State '569A 4-Bit Binary Up/Down Synchronous Counter (3-State) Product Specification Logic Products FEATURES • Speed Improved over LS568/ LSS69 • Synchronous counting and

74LS569A

Abstract: SN54LSXXXJ SN74LSXXXN
Contextual Info: SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN54 / 74LS569A is designed as programmable up/down BCD and Binary counters respectively. These devices have 3-state outputs for use in bus organized systems. With the exception of output enable OE and

74LS569A

Abstract: SN54LSXXXJ SN74LSXXXN
Contextual Info: SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN54 / 74LS569A is designed as programmable up/down BCD and Binary counters respectively. These devices have 3-state outputs for use in bus organized systems. With the exception of output enable OE and

LS-573

Abstract: LS573 74LS563DC 74LS563FC LS373 54LS563DM 54LS563FM 74LS563PC
Contextual Info: 5 Ö 3 563 / 7 54LS/74LS563 CONNECTION DIAGRAM PINOUT A £>/,// jä OCTAL D-TYPE LATCH With 3-State Outputs ¡>5 ^ c IPI 1.0 m ^ Th 563 'S a h'9h speed octal latch wi,h buffered common Latch Enable (LB and buffered common Output Enable <OE) inputs. ^ Stn ♦hir 5J|S fu " ctio n a lly indentical to

74ls 8 RS triggers

Contextual Info: 74LS568A, 569A Signetics 3-State Bidirectional Counters '568A BCD Decade Up/Down Synchronous Counter 3-State '569A 4-Bit Binary Up/Down Synchronous Counter (3-State) Product Specification Logic Products FEATURES • Speed improved over LS568/ LS569 • Synchronous counting and

Contextual Info: 5t>3 563 7 CONNECTION DIAGRAM P IN O U T A 54LS/74LS563 o i l I P O C TA L D-TYPE LATCH With 3-State Outputs DESCRIPTION— T h e ’563 is a high speed octal latch with buffered com m on Latch Enable ( L B and buffered com m on Output Enable ( O B inputs.

OCXX

Abstract: 74LS569 SN64
Contextual Info: Mj /M O TO R O LA SN54/74LS569 DESCRIPTION — Th e S N 54 L S /7 4 L S 5 6 9 is d e s ig n e d as p ro g ra m m a ­ ble u p /d o w n B C D and B in a ry co u n te rs resp ectiv ely . T h ese d ev ices have 3-state o u tp u ts fo r use in b u s o rg a n ize d system s. W ith the

Contextual Info: & M O T O R O L A SN54LS/74LS568 SN54LS/74LS569 DESCRIPTION — The SN54LS/74LS568 and SN54LS/74LS569 are designed as p ro g ra m m a b le u p /d ow n BCD and Binary counters re spe ctive ly. These devices have 3-state o u tp u ts fo r use in bus organized system s. W ith th e e xception o f o u tp u t enable (OE and

Contextual Info: 74LS568A, 569A Signetics 3-State Bidirectional Counters '568A BCD Decade Up/Down Synchronous Counter 3-State '569A 4-Bit Binary Up/Down Synchronous Counter (3-State) Product Specification Logic Products FEATURES • Speed improved over LS568/ LS569 • Synchronous counting and

Contextual Info: TC74HCT563AP/AF TC74HCT573AP/AF/AFW O C T A L D - T Y P E L A T C H WI TH 3 - S T A T E O U T P U T TC74HCT683AP/AF INVERTING TC74HCT673AP/AF/AFW N O N -IN V E R T IN G The TC74HCTS63A and TC74HCT573A are high speed CMOS OCTAL LATCH with 3 -S T A T E O UTPUT

T574A

Abstract: TC74HCT564A
Contextual Info: ^tC74HCT564AP/AF J TC74HCT574AP/AF O C T A L D - T Y P E F L I P - F L O P W IT H 3 - S T A T E T C 7 4H C T 56 4A P /A F IN V E R T IN G T C 74H C T574A P /A F N O N -IN V E R T IN G OUTPUT T he TC74HCT564A an d HCT574A a re high speed CMOS O C T A L F L I P - F L O P s w ith 3 - S T A T E O U T P U T fa b rica te d

74HC573A

Contextual Info: TC74HC563AP/AF TC74HC573AP/AF O CTAL D - T Y P E L A T C H W ITH 3 - S T A T E OUTPUT TC74HC563AP/AF IN V E R T I N G TC74HCS73AP/AF N O N -IN V E R T IN G T he TC74HC563A a n d TC74HC573A a re h ig h speed CMOS O C T A L L A T C H w ith 3 -S T A T E OUTPUT

HC574

Abstract: 574ap transistor HC574A TC74HC564AF TC74HC564AP TC74HC574AF TC74HC574AP
Contextual Info: TC74HC564AP/AF,574AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC564AP,TC74HC564AF,TC74HC574AP,TC74HC574AF Octal D-Type Filp-Flop with 3-State Output TC74HC564AP/AF Inverting TC74HC574AP/AF Non-Inverting TC74HC564AP, TC74HC574AP The TC74HC564A and HC574A are high speed CMOS OCTAL