54LS73A Search Results

Contextual Info: M M O T O R O L A M ilita ry 54LS 73A Dual J-K Flip-Flop W ith C lear ELECTRICALLY TESTED PER: MIL-M-38510/30101 M P O /////// The 54LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs

Contextual Info: M MOTOROLA M ilitary 5 4 LS 7 3 A Dual J-K Flip-Flop With Clear ELECTRICALLY TESTED PER: MIL-M-38510/30101 The 54LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that w hen the clock goes HIGH, the inputs are enabled and data will be accepted. The logic of the J and K inputs may

J-K Flip flops

Abstract: LS73A LS73 SN5473 SN54LS73A SN74 SN7473 SN74LS73A
Contextual Info: SN5473, 54LS73A, SN7473, SN74LS73A □UAL J-K FLIP-FLOPS WITH CLEAR SDLS118 DECEMBER 1983 - • Package Options Include Plastic "Small Outline'' Packages. Flat Packages, and Plastic and Ceramic DIPs REVISED MARCH 1988 S N 5 4 7 3 . S N 5 4 L S 7 3 A . . . J OH W PA CK A G E

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

54LS73A

Abstract: qml-38535 CDFP2-F14 GDFP1-F14
Contextual Info: REVISIONS DATE YR-MO-DA DESCRIPTION LTR APPROVED REV SHEET REV SHEET REV STATUS OF SHEETS PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A REV SHEET 8 PREPARED BY

SN7401

Abstract: sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c
Contextual Info: INDEX PAGE TTL Integrated Circuits Mechanical Data 1 TTL Interchangeability Guide 6 Functional Selection Guide 19 Explanation of Function Tables 38 54/74 Families of Compatible TTL Circuits 40 TTL INTEGRATED CIRCUITS MECHANICAL DATA J ceramic dual-in-line package

Contextual Info: M MOTOROLA M ilita ry 54L S 73A Dual J-K Flip-Flop W ith C lear ELECTRICALLY TESTED PER: MIL-M-38510/30101 M mini The 5 4 L S 7 3 A offers individual J, K, clear, and clock inputs. These dual flip -flo p s are desig n ed so th a t w hen the clo ck g oe s HIG H , th e inputs

74LS73AN

Abstract: Q356
Contextual Info: R C H U - P S E M IC O N D U C T O R tm DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs sition tim e of th e negative going edge o f the clock pulse. The data on the J and K inputs is allowed to change w hile the

Contextual Info: TYPES SN5473, SN54H73, SN54L73, 54LS73A, SN7473, SN74H73, SN74LS73A DUAL J- K FLIP-FLO PS WITH CLEAR E V IS E D D E C E M B E R 1 9 8 3 • * Package Options Include Plastic and ■ Ceramic DIPs

54l73

Abstract: IC TTL 7473 SN54L73 IC 7473
Contextual Info: TYPES SN5473, SN54H73, SN54L73, 54LS73A, SN7473, SN74H73, SN74LS73A DUAL J-K FLIP-FLOPS WITH CLEAR REVISED DECEMBER 1983 Package Options Include Plastic and C eram ic DIPs S N 5 4 L 7 3 . , . J P AC KA G E S N 7 4 7 3 , S N 7 4 H 7 3 . . . J OR N P AC K A G E

54LS73A

Contextual Info: S E M IC O N D U C T O R TM DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs sition tim e of th e negative going edge o f the clock pulse. The data on the J and K inputs is allowed to change w hile the

logos 4012B

Abstract: 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
Contextual Info: L p i > « , * S E m Ic O N VOLUM E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 5th EDITION 1985 Revised June 1985 COMPILED AND PUBLISHED BY S E M IC O N IN D E X E S L IM IT E D THE SEMICON INDEX SERIES CONSISTS OF VOLUME 1 TRANSISTOR INDEX VOLUME 2 DIODE & SCR INDEX