64KXL8 Search Results

ic dm 311

Contextual Info: b^mOTD P A R A D IG M GOGOLS 561 «P A T PDM43018 ' 64K X 18 Fast CMOS Cache Tag SRAM Features Description □ □ □ □ □ □ □ □ The PDM43018 is a 1,179,648 b it random access cache tag m em ory organized as 64Kxl8. It is well suited to 64-bit CPU's such as the Pentium , allow­

STP5111

Contextual Info: S un M ic r o e l e c t r o n ic s July 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.

PDM44018

Contextual Info: bTHlDTD OODCmS? Tbfc. IP AT PDM 44018 64K x 18 Fast CMOS Synchronous Static SRAM with Burst Counter Features Description □ Interfaces directly with the i486 , Pentium™ processors 66.6,60,50,40,33.3 MHz The PDM44018 is a 1,179,648 bit synchronous ran­

Contextual Info: STP5111A S un M ic r o e l e c t r o n ic s J u ly 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-I m odule is a high perform ance, SPARC V9 com pliant, small form factor processor module,

Contextual Info: PRELIMINARY DATA SHEET NEC |jPD461318/36LSl Bi-CMos S y n c h r o n o u s S t a t i c Ram MAR. 1995 Description The nPD461318/36LS1 is a 65,536-word by 18-blt / 32,768-word by 36-blt synchronous static RAM fabricated with advanced BI-CMOS technology using

Contextual Info: Synchronous SRAM Selector Guide Electronic Designs Inc. Introducing EDl’s Newest Product Family: Synchronous Static RAMs Synchronous SRAMs make the system design job easier by pulling system glue logic onto the memory chip. They combine traditional SRAM operations with Input/Output

fc4k

Abstract: 4016B AD10 AD17 Z8000 CD 4016 PIN DIAGRAM AP-28A 16-Bit Microcomputers u107 refresh logic
Contextual Info: Advanced Micro Computers A subsidiary of Advanced Micro Devices Am96/1000 Series Dynamic Random-Access Memory Boards User’s Manual 00680140 $5.00 REVISION RECORD REVISION 01 DESCRIPTION Preliminary Issue 5/15/80 02 Manual Updated To Support A3 Fabrication Level

i486 sx pinout

Contextual Info: Paradigm' bTHlCHD 00DÜ457 Tbfc. « P A T PDM44018 64K x 18 Fast CMOS Synchronous Static SRAM with Burst Counter Features Description □ Interfaces directly with the i486 , Pentium ™ processors 66.6,60,50,40,33.3 MHz The PDM44018 is a 1,179,648 bit synchronous ran­