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    74ALS112AD Search Results

    74ALS112AD Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    SN74ALS112AD Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Visit Texas Instruments
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    74ALS112AD Price and Stock

    Texas Instruments SN74ALS112AD

    IC FF JK TYPE DUAL 1BIT 16SOIC
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    Mouser Electronics SN74ALS112AD 238
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    Rochester Electronics LLC SN74ALS112AD

    SN74ALS112A DUAL J-K NEGATIVE-ED
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    Texas Instruments SN74ALS112ADR

    IC FF JK TYPE DUAL 1BIT 16SOIC
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    Rochester Electronics LLC SN74ALS112ADR

    IC FF JK TYPE DUAL 1BIT 16SOIC
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    74ALS112AD Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74ALS112AD Philips Semiconductors Dual J-K negative edge-triggered flip-flop Original PDF

    74ALS112AD Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    k0215

    Abstract: 74ALS112A 74ALS 74ALS112AD 74ALS112AN
    Text: INTEGRATED CIRCUITS 74ALS112A Dual J-K negative edge-triggered flip-flop Product specification IC05 Data Handbook Philips Semiconductors 1996 June 27 Philips Semiconductors Product specification Dual J-K negative edge-triggered flip-flop DESCRIPTION 74ALS112A


    Original
    PDF 74ALS112A 74ALS112A, k0215 74ALS112A 74ALS 74ALS112AD 74ALS112AN

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs M 74ALS1035P TËJ MITSUB ISH I {DGTL LOGIC} Q012732 G | HEX NONINVERTING BUFFER W ITH OPEN COLLECTOR OUTPUT / DESCRIPTION PIN CONFIGURATION TOP VIEW ” T h e M 7 4 A L S 1 0 3 5 P is a s e m ic o n d u c to r in te g ra te d c ir­ c u it c o n s is tin g o f six n o n -inverting b u ffe rs w ith open


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    PDF 74ALS1035P Q012732 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mll

    ci la 7610

    Abstract: No abstract text available
    Text: c +e MITSUBISHI ALSTTLs . op,00° M 74A L S 620A -1P v ie N v t ^s ^ - 3 _ OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI CDGTL LOGIC) DESCRIPTION The M74ALS6Í20A-1P is a semiconductor integrated cir­ cuit consisting of eight bus transm itter/receiver circuits


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    PDF M74ALS6 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil ci la 7610

    ci la 7610

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs M 7 4 A LS 6 5 1 P 7 -52-3/ OCTAL BUS TRANSCEIVER/REGISTER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 91 D 12674 (DGTL LOGIC ) DESCRIPTION The M74ALS651P is a semiconductor integrated circuit consisting of eight bus transceiver/registers with 3-state


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    PDF M74ALS651P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil ci la 7610

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI íDGTL LOGICI TI DEI't.E4*1ñ27 D0ia3flD S MITSUBISHI ALSTTLs M 624 9 82 7 M IT S U B IS H I DG TL L O G IC 7 4 A 91D L S 1 1 3 A P 12380 D DUAL J-K N EG A TIVE EDGE-TRIGGERED FLIP -FLO P W IT H SET T -H (* -o 7 -o y DESCRIPTION PIN CONFIGURATION (TOP VIEW)


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    PDF 74ALS113AP 16P2P 16-PIN 150mil T-90-20 20P2V 300mil

    m74als191p

    Abstract: No abstract text available
    Text: ÍDGTL LOGIC} 91D TI De | 12446 b241fl27 □ 0 1 2 4 4b ñ r D MITSUBISHI ALSTTLs M 74A LS191P SYNCHRONOUS PRESETTABLE UP/DOWN 4 -B IT BINARY COUNTER W ITH MODE CONTROL • 7 ^ V ' 5 ' ' ^ >3 DESCRIPTION - o 7 PIN CONFIGURATION TOP VIEW Th e M 7 4 A L S 1 9 1 P is a s e m ic o n d u c to r in te g ra te d c irc u it


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    PDF b241fl27 LS191P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil m74als191p

    74ALS640

    Abstract: No abstract text available
    Text: MITSUBISHI -CDGTL LOGIC} dT | ba^flS? D O i a k b B 4 M ITSUBISHI A L ST T Ls sc* -s s 5 " : . M 7 4 A LS6 4 7 P ,o.9B OCTAL BUS TR A N SC EIV ER /R EG IST ER WITH OPEN COLLECTOR OUTPUT NONINVERTED 6249827 MITSUBISHI CDGTL LOGTC) DESCRIPTION The M74ALS647P is a semiconductor integrated circuit


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    PDF M74ALS647P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil 74ALS640

    M74ALS374P

    Abstract: dd127 4d40t
    Text: MITSUBISHI iDGTL LOGIC} TI 1mF | bSLHÖ27 D0155E5 5 MITSUBISHI ALSTTLs ,oC* M 74A LS374P OCTAL D-TYPE EDGE-TRIGGERED FLIP FLOP W ITH 3-STATE OUTPUT NONINVERTED 6249827 MITSUBISHI 9 1D 12525 (DGTL LOGIC) DESCRIPTION D PIN CONFIGURATION (TOP VIEW) T h e M 7 4 A L S 3 7 4 P is a s e m ic o n d u c to r in te g ra te d c irc u it


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    PDF D0155E5 LS374P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil M74ALS374P dd127 4d40t

    D0-15L

    Abstract: LS74AD
    Text: 7 z1 % > -'0 '7 -¿ ? S ' M 74ALS873AP ¡C' 3< DUAL 4 -B IT D-TYPE TRANSPARENT LATCH W ITH 3-STATE OUTPUT NONINVERTED 50t° CDGTL LOGIC) DESCRIPTION PIN CONFIGURATION (TOP VIEW) DIR EC T RESET , p " IN P U T I M ° O UTPUT } -q C O N TR O L IN PU T E c


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    PDF 74ALS873AP M74ALS873AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil D0-15L LS74AD

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs M 7 4 A L S 1 0 0 2 À P a D eE| tk24=]aS7 0015712 > | MITSUBISHI IDGTL LOGIC} 11 QUADRUPLE 2-IN P U T PO SITIVE NOR BUFFER 7 ^ V 3 - /S DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M74ALS1002AP is a semiconductor integrated cir­ cuit consisting of four 2-input positive-logic NOR buffer


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    PDF M74ALS1002AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil

    J 5027 R

    Abstract: BEM 6K
    Text: MIT SUBISH I íDGTL L O G I C } T I d ËT| ^5^027 ~JZ.SZt~3/ G0127SS □ MITSUBISHI ALSTTLs M 74A L S 1621A P I 62 49 8 2 7 M I T S U B I S H T T D G T L T o G r ^ ~ 910 12755 D OCTAL BUS TRANSCEIVER W ITH OPEN COLLECTOR OUTPUT NONINVERTED) DESCRIPTION


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    PDF G0127SS M74ALS1621AP 74ALS621AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil J 5027 R BEM 6K

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI -CDGTL L O G I O TI DE | bSMTfla? 001E4b4 □ M IT SU B ISH I ALSTTLs M74ALS241AP 6249827 MITSUBISHI DGTL LOGIC 91D 12464 D O CTAL B U F F E R /L IN E D R IV E R W IT H 3 -ST A T E O U T PU T (N O N IN V E R T E D ) DESCR IPTIO N The M74ALS241AP is a semiconductor integrated circuit


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    PDF 001E4b4 M74ALS241AP M74ALS241AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs & M74ALS169BP T ' - v ’S '- J J - o SYNCHRONOUS PRESETTABLE UP/DOWN 4 -B IT BINARY COUNTER 6249827 MITSUBISHI DG TL LOGIC DESCRIPTION Th e M 74A L S 169 B P is a sem iconductor integrated circuit of a synchronous p resettable u p /d o w n


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    PDF M74ALS169BP 16P2P 16-PIN 150mil T-90-20 20P2V 300mil

    74als561

    Abstract: No abstract text available
    Text: MITSUBISHI íDGTL LOGIC} "DÌI bSMTñE? 00123ki7 5 TI W~ M IT S U B IS H I* !L. S T T L s M74ALS38AP 91D 12367 D 6249827 MITSUBISHI DGTL LOGIC QUADRUPLE 2 -IN P U T P O S ITIV E NAND BUFFER W IT H OPEN COLLECTOR OU TPUT T - - V 3 - / S DESCRIPTION PIN CONFIGURATION (TOP VIEW)


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    PDF 00123ki7 M74ALS38AP 150mil 16P2P 16-PIN T-90-20 20P2V 300mll 74als561

    m74als

    Abstract: M74ALS109AP 74ALS640
    Text: M IT S U B IS H I {D G T l T o G IcT ^ I b H 1 SS? M 6249827 MITSUBISHI 7 4 A CDGTL LOGIC 91D J STTLs L S 1 0 9 A 12 37 4 P D DUAL J-R POSITIVE EDGE-TRIGGERED FLIP-FLOP W ITH SET AND RESET T -V & -0 7 - Ô ? DESCRIPTION PIN CONFIGURATION TOP VIEW) The M74ALS109AP is a semiconductor Integrated circuit


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    PDF M74ALS109AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil m74als 74ALS640

    gt 568

    Abstract: m74als568ap m74als568a
    Text: MITSUBISHI -CDGTL L O G I O de! TI tsMiaa? QGiasai 4 |~~ M IT S U B IS H I ALSTTLs ~ J- M 74A LS 568A P S Y N C H R O N O U S P R E S E T T A B L E U P /O O W N D EC A D E C O U N TE R _ W IT H 3 -S T A T E O U T P U T 1H249827 MITSIJBISHI


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    PDF 1H249827 16P2P 150mil 20P2V 300mil E--07 gt 568 m74als568ap m74als568a

    M74ALS193P

    Abstract: TF2N 154027
    Text: MITSUBISHI I -CDGTL L O G I C ? =11 De | bEMTñE? □□12454 ñ T~ ^ MITSUBISHI ALSTTLs . M74ALS193P SYNCHRONOUS PRESETTABLE U P /D O W N 4 -B IT B IN A R Y COUNTER 6248827 MITSUBISHI ÍDGTL LOGIC DESCRIPTION The M74ALS193P is a semiconductor integrated circuit


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    PDF M74ALS193P M74ALS193P 16P2P 16-PIN 150mil T-90-20 20P2V 300mil TF2N 154027

    M74ALS1032AP

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs M 74ALS1 0 3 2 AP M I T S U B I S H I - C D G T L L O G I C } T I D È I ” L ^ M ^ ñ S ? 1 2 7 5 fi QUADRUPLE 2-IN P U T POSITIVE OR BUFFER _ DESCRIPTION _ _ _ _ PIN CONFIGURATION TOP VIEW The M74ALS1032AP is a semiconductor integrated cir­


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    PDF 74ALS1 M74ALS1032AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil

    c 2274

    Abstract: No abstract text available
    Text: '7 ' '0 7 -0 5 * MITSUBISHI ALSTTLs OCTAL D -TY P E EDGE-TRIGGERED FLIP-FLO P W IT H 3-S TA TE O U TPU T N O N IN V E R TE D . Ä > a 6249827 M IT S U B IS H I (D G TL L O G IC ) DESCRIPTION consisting o f eight D-type positive edge-triggered flipflop circuits w ith 3-state noninverted output and is pro­


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    PDF M74ALS574AP 150mil 16P2P 16-PIN T-90-20 20P2V 20-PIN 300mil c 2274

    74ALS273P

    Abstract: M74ALS273P
    Text: MITSUBISHI -CDGTL LOGIC} TI D e B bSMTñE? DDIHSDI 5 MITSUBISHI ALSTTLs M 74A LS273P T z- / ù > ~ o y - < o s ' OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH RESET 9 1D 12501 6249827 MITSUBISHI ÍDGTL LOgT c T DESCRIPTION PIN CONFIGURATION TOP VIEW


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    PDF LS273P 74ALS273P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil M74ALS273P

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs M74ALS623AP MITSUBISHI O G T L LOGIC} bSMTflS? DOiabS? 2 OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT INONINVEBTED 7 ’" - 5 2 - 3 / DESCRIPTION The M74ALS623AP is a semiconductor integrated circuit consisting of eight bus transm itter/receiver circuits with


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    PDF M74ALS623AP M74ALS623AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil

    dd127

    Abstract: 74ALS640 74ALS138DP 74ALS374DW ci la 7610 74als642 74als245a 74ALS245ADW 74als561 M74ALS04
    Text: n i T S U B I S H I -CDGTL L O G IC } tiE T l a 57 O G l^ t^ b | MITSUBISHI ALSTTLs M 74A LS40A P 6 2 4 9 8 2 7 M T T s U B r S H F T M fr T Ö G r c T - 9 1 0 1 2 3 6 9 D DUAL 4-IN P U T POSITIVE NAND BUFFER 7 DESCRIPTION - - * /3 - tT/ PIN CONFIGURATION TOP VIEW


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    PDF LS40A 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mll dd127 74ALS640 74ALS138DP 74ALS374DW ci la 7610 74als642 74als245a 74ALS245ADW 74als561 M74ALS04

    74ALS131

    Abstract: 74ALS573AD
    Text: 7 = ^ ce v -y -0 7 ' -^ S ' MITSUBISHI ALSTTLs M 74ALS874AP .< „c X '8n DUAL 4 -B IT D -T Y P E EDGE-TRIGGERED FLIP-FLO P _ W IT H 3 -S T A T E O U TPU T N O N IN V E R T E D 0249827 MITSUBISHI ÌOGTL LOGIC) DESCRIPTION The M 74ALS874AP Is a sem iconductor integrated circuit


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    PDF 74ALS874AP 74ALS874AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil 74ALS131 74ALS573AD

    74als520

    Abstract: dd127
    Text: MITSUBISHI -CDGTL LOGIC* TI ^F|t.SMTñ27 0015543 7 J ~ MITSUBISHI ALSTTLs & M 74A LS519P > ^ vA" 0\ 7 ^ .V «" / 5 e / ' 7 8-BIT MAGNITUDE COMPARATOR WITH OPEN COLLECTOR OUTPUT 9 1D 12543 6249827 MITSUBISHI DGTL LOGIC DESCRIPTION Th e M 7 4 A L S 5 1 9 P is a sem iconductor integ rated circuit


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    PDF LS519P 150mil 16P2P 16-PIN T-90-20 20P2V 20-PIN 300mil E--07 74als520 dd127