74ALS30 Search Results

Philips Semiconductors Selection Guide

Abstract: 74ALS08
Contextual Info: Philips Semiconductors Functional selection guide GATES FUNCTION INVERTERS NAND NOR DEVICE NUMBER NUMBER OF PINS Hex inverters 74ALS04B 14 Quad 2-input 74ALS00A 14 Triple 3-input 74ALS10A 14 Dual 4-input 74ALS20A 14 8-input 74ALS30A 14 Quint 2-input NAND, open collector

Contextual Info: Philips Semiconductors Product specification 8-input NAND gate TYPE 74ALS30A TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 5.0ns 0.5mA 74ALS30A PIN CONFIGURATION ORDERING INFORMATION ORDER CODE DRAWING NUMBER DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%,

74ALS

Abstract: 74ALS30A 74ALS30AD 74ALS30AN
Contextual Info: 74ALS30A 8-Input NAND G a te Preliminary Specification OUTPUT INPUTS A B C D E F G H H H H H H H L X X X X X X X L X X X X X X X L X X X X X X X L X X X X X X X L X X X X X X X L X X X X X X X L X X X X X X X NOTES: H = High voltage level L = Low voltage level

SN54ALS30A

Abstract: SN54AS30 SN74ALS30A SN74AS30
Contextual Info: O 'n - 'li ;• , ' ' SN54ALS30A, S N 54A S30, 74ALS30A, SN 74A S30 8 INPUT POSITIVE-NAND GATES M A R C H 1 9 8 4 — R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S 3 0 A , S N 5 4 A S 3 0 . . . J P AC KA G E S N 74ALS30A, S N 74A S 30 D OR N P AC KA G E P a c k a g e O p tio n s In c lu d e P la s tic " S m a ll

Contextual Info: Philips Sem iconductors Product specification 8-input NAND gate TYPE 74ALS30A TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 5.0ns 0.5m A 74ALS30A PIN CONFIGURATION A [T KJ "Î4| B [T ORDERING INFORMATION O RDER CODE DESCRIPTION CO M M E R C IA L RANGE

74ALS

Abstract: 74ALS30A 74ALS30AD 74ALS30AN
Contextual Info: INTEGRATED CIRCUITS 74ALS30A 8-Input NAND gate Product specification IC05 Data Handbook Philips Semiconductors 1991 Feb 08 Philips Semiconductors Product specification 8-input NAND gate TYPE 74ALS30A TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL

MS-012-AB

Abstract: 74ALS 74ALS30A 74ALS30AD 74ALS30AN SOL-24
Contextual Info: Signetics 74ALS30A 8-lnput NAND Gate Preliminary Specification ALS Products FUNCTION TABLE INPUTS OUTPUT A B c D E F G H Ÿ H L X X X X X X X L H H H H H H H H H X L X X X X X X H X X L X X X X X H X X X L X X X X H X X X X L X X X H X X X X X L X X H X X

MH1SS1

Abstract: TESLA mh 7400 MH 7404 mh 7400 tesla cdb 838 tda 7851 L 741PC TDB0124DP tda 4100 TDA 7851 A
Contextual Info: m ö lk ^ o e le l-c te n a n il-c Information Applikation RGW Typenübersicht Vergleich Teil 2: RGW M iM U Z A U l KÉD lnrüÖC=SraO Information Applikation HEFT 50 RGW Typenübersicht + Vergleich Teil 2: RGW wob Halbleiterwerk Frankfurt /oder bt r iab im v«b kombinat mikrootektronik

M74ALS374P

Abstract: dd127 4d40t
Contextual Info: MITSUBISHI iDGTL LOGIC} TI 1mF | bSLHÖ27 D0155E5 5 MITSUBISHI ALSTTLs ,oC* M 74A LS374P OCTAL D-TYPE EDGE-TRIGGERED FLIP FLOP W ITH 3-STATE OUTPUT NONINVERTED 6249827 MITSUBISHI 9 1D 12525 (DGTL LOGIC) DESCRIPTION D PIN CONFIGURATION (TOP VIEW) T h e M 7 4 A L S 3 7 4 P is a s e m ic o n d u c to r in te g ra te d c irc u it

D0-15L

Abstract: LS74AD
Contextual Info: 7 z1 % > -'0 '7 -¿ ? S ' M 74ALS873AP ¡C' 3< DUAL 4 -B IT D-TYPE TRANSPARENT LATCH W ITH 3-STATE OUTPUT NONINVERTED 50t° CDGTL LOGIC) DESCRIPTION PIN CONFIGURATION (TOP VIEW) DIR EC T RESET , p " IN P U T I M ° O UTPUT } -q C O N TR O L IN PU T E c

M74ALS193P

Abstract: TF2N 154027
Contextual Info: MITSUBISHI I -CDGTL L O G I C ? =11 De | bEMTñE? □□12454 ñ T~ ^ MITSUBISHI ALSTTLs . M74ALS193P SYNCHRONOUS PRESETTABLE U P /D O W N 4 -B IT B IN A R Y COUNTER 6248827 MITSUBISHI ÍDGTL LOGIC DESCRIPTION The M74ALS193P is a semiconductor integrated circuit

8kx8 sram

Abstract: 74AHCT521 nand 12 inputs 74F244A ADSP-2100 ADSP-2100A CY7C185 PMD70 PMD0-23 74ALS30
Contextual Info: Memory Interface 16.1 16 OVERVIEW This chapter presents some examples that illustrate basic considerations for interfacing memory to ADSP-2100 Family processors. An example of a multiple paging scheme for data memory is included. Memory-mapped I/O is also demonstrated.

CHOA

Contextual Info: 74ALS30A, SN74AS30, SN54ALS30A, SN54AS30 8-INPUT POSITIVE-NAND GATES MARCH 1984 - REVISED MAY 1986 • • SN S4A LS30A . SN 54A S30 J PACKAG E SN 74A LS30A . S N 74 A S3 0 . . . D OR N PACKAG E Package O ptions Include Plastic "S m a ll O u tlin e" Packages, Ceram ic Chip Carriers,

74ALS573AD

Abstract: 74ALS574AD
Contextual Info: M ITSUBISHI ALSTTLs r M 7 4 A L S 1 6 4 5 A P D e | bSMTfla? DDia77T 3 MITSUBISHI -CDGTL LOGIC} OCTAL BUS TR A N SC EIVER W IT H 3-STATE O U TPUT N O N IN VERTED - 7 “' » DESCRIPTION The M74ALS1645AP is a semiconductor integrated cir­ cuit consisting of eight bus transmitter/receiver circuits

74ALS131

Abstract: 74als245a
Contextual Info: MITSUBISHI -CDGTL LOGIC} 11 DE| ^541057 □OISMflñ B r M ITSU B IS H I A LS TTLs s i& , * c M p 7 4 A L S 2 5 1 P • •T-66-21-53 _ 8-LINE TO 1-LINE DATA SELECTOR /M U LTIP LEXER W ITH 3-STATE OUTPUT "6249827 M I T S U B I S H I <DGTL LO GI C

dd127

Contextual Info: D e | hS4clflE!7 GG1E3M7 7 |~~ MIT SUB ISHI íDGTL LOGIC} TI MITSUBISHI ALSTTLs M74ALS15AP 6249827 MITSUBISHI <DGTL LOGI C 91D 12347 D TRIPLE 3-IN P U T POSITIVE AND GATE W ITH OPEN COLLECTOR OUTPUT DESCRIPTION Th e M 7 4A L S 15A P is a se m ic o n d u c to r in teg rated circu it

1e4d

Abstract: ls151p LS29 LS245 74als15
Contextual Info: MITSUBISHI -CDGTL LOGIC} TI -DE | 00123^0 S MITSUBISHI ALSTTLs ,o c* M 7 A L S ! 4 5 1 JP T-66-21-53 8-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH STROBE 6249827 MITSUBISHI DGTL LOGIC r DESCRIPTION T h e M 7 4A L S 151 P is a sem iconductor in teg rated circuit

LS353P

Abstract: d12518 74ALS04A
Contextual Info: MI TSU BISHI {DGTL LOGIC! TI » F l b5MTÖ27 0Q1SS1Ö fl | ~ MITSUBISHI ALSTTLs M 74A LS353P o O ° DUAL 4 -U N E TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 9 1 D 12518 (DGTL LOGI C) DESCRIPTION T h e M 7 4A L S 353 P is a sem iconductor integrated circuit

CD4558

Abstract: NC7S125 MC74F138N HCF4541 Motorola MC74HC251N 74ACT161 DHVQFN-20 74V1G08 SOT323/5 HCF4017 SN74ACT14DR
Contextual Info: Logic Cross-Reference Introduction This Logic Cross-Reference for Buyers, Distribution Specialists and others with an interest in Logic will assist in finding a device made by Texas Instruments that is identical or similar to many of our competitors’ Logic products.

MSD 7818

Abstract: MN9106 information applikation 7490 N TDA 5700 information applikation mikroelektronik udssr hefte 143KT1 Mikroelektronik Information Applikation K 176 LE, K 561 LN
Contextual Info: In n in ik ü r Q fâ lI Information Applikation RGW Typen­ übersicht + Vergleich TeiM UdSSR JitfÆÊL JUUUUUUL&JJJUL i m i n i ^ r ^ c z l c i c b p o n Information Applikation , 9 H E F T 4 9 * R G W T y p e n ü b e r s i c h t + V e r g l e i c h Teil 1

74aLS808

Abstract: 74ALS677 74ALS468 SN74AS877 SN74LS630 SM54A NCE 7190 74ls631 SN74LS693 TTL Data Book for Design Engineers
Contextual Info: ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS FUNCTION DEVICE AS1032 ALS1034 AS1034 Quad 2-Input OR Buffers/ Drivers A VAILABILITY NOW NOW NOW Hex Drivers NOW ALS1035 Hex Buffers with D-C Outputs NOW AS1036 Quad 2-Input NOR Line Driver NOW ALS1240

74als05

Abstract: 74als245a LS574A
Contextual Info: MITSUBISHI íDGTL I LOGIC} _ TI 6249827 MITSUBISHI D eT | bEMTflE? □D lE 7t.l t I MITSUBISHI ALSTTLs M 74ALS1 6 2 3 AP DGTL LOGIC - 91D 12761 D OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT (NONINVERTED) 7 = 5 2 ? -3 / DESCRIPTION PIN CONFIGURATION (TOP VIEW)

mitsubishi inverter schematic

Abstract: 74ALS131 74ALS08D
Contextual Info: • i MITSUBISHI O G T L LOGIC} TI D e hEM^AS? DD1E734 3 ï~ MITSUBISHI ALSTTLs M 7 4 A L S 1 2 4 0 A P 6249827 MITSUBISHI CDGTL LOGIC 91D 12734 D OCTAL BUFFER/LINE DRIVER W ITH 3-STATE OUTPUT ( INVERTED) 7 ~ S 'S ? - 0 ^ 7 DESCRIPTION PIN CONFIGURATION (TOP VIEW)

diode ED 74a

Abstract: se 115n 74ALS04A
Contextual Info: MM MITSUBISHI -CDGTL LOGIC} T1 6249827 M I T S U B I S H I {D G T L 9 1 D 1 23 6 3 D GG123b3 S |~ MITSUBISHI ALSTTLs LOGIC M 74A LS 33A P QUADRUPLE 2-IN P U T POSITIVE NOR BUFFER W ITH OPEN COLLECTOR OUTPUT DESCRIPTION The M 7 4A L S 33A P is a se m ic o n d u c to r in teg rated circu it