960J Search Results

Contextual Info: Advance Data Sheet September 1996 m icroelectronics group Lucent Technologies Bell Labs Inrxsvatians 960JX Embedded 32-Bit RISC Processor Features • Functionally equivalent to Inters 960JA/JF embedded 32-bit microprocessor ■ High-performance embedded architecture

Contextual Info: Product Brief May 1997 960JX Embedded 32-Bit RISC Processor Features • Functionally equivalent to Intel ’s 960JA/JF embedded 32-bit microprocessor ■ High-performance embedded architecture ■ High-speed interrupt controller ■ Two on-chip timers ■

24CO8

Abstract: a19t transistor 24co4 IC circuit diagram pin configurations of 24co4 1 24co4 S5933QE Sandy Bridge eeprom 24co2 24CO2 CSI 24C04
Contextual Info: A PPLIED M ICRO C IRCUITS C ORPORATION PCI PRODUCTS DATA BOOK For Marketing and Application Information Contact: Please refer to AMCC’s website at www.amcc.com for the latest Device Summary information for the S5920 and S5933 PCI products. Applied Micro Circuits Corporation

LA3101

Abstract: PC19060 Igus LD-310 LDL8 pci9080 80960Cx 93C06 I960CX NM93CS06
Contextual Info: PCI 9060 T E C December, 1995 VERSION 1.2 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General D escrip tio n _ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local

Contextual Info: P fö H y K ä M Ä G W in te i 960JA/JF 3.3V EMBEDDED 32-BIT MICROPROCESSOR 3.3 V Version o f the 960JA/JF Processor Pin/Code Compatible with all 960Jx Processors High-Performance Embedded Architecture — One Instruction/Clock Execution — Load/Store Programming Model

Reference Designs

Abstract: 28F016XD 28F016XS designs
Contextual Info: COMPUTER-AIDED ENGINEERING TOOLS INTEL Reference Designs • ■ ■ ■ Subsystem designs focused around processor/controller and flash memory Simulated and/or lab-tested Include schematics, logic files, timing analysis, S/W and/or documentation Saves design time

28F016XD

Abstract: 28F016XS
Contextual Info: COMPUTER-AIDED ENGINEERING TOOLS INTEL Reference Designs • ■ ■ ■ Subsystem designs focused around processor/controller and flash memory Simulated and/or lab-tested Include schematics, logic files, timing analysis, S/W and/or documentation Saves design time

a19t

Abstract: A18T 92121 0011 amcc s5933 pci controller amcc S5933 1996 a12t A11t 92121 001 A8-15 S5933
Contextual Info: APPLICATION NOTE 1.0 ADD-ON DMA CONTROLLER DESIGN FOR THE S5933 ADD-ON DMA CONTROLLER DESIGN FOR THE S5933 INTRODUCTION The S5933 allows PCI bus master transfers through the FIFO interface. The function of filling and emptying the FIFO is left to add-on logic. Many add-on designs implement a microprocessor or microcontroller with an integrated DMA

Contextual Info: .«artHEH » .¿•■■■I_ im ara« IM I 1 WIMIBII Galileo Technology, System Controller For ¡960JX Processors FEATURES Integrated system controller for embedded applica­ tions Supports the ¡960JX family of CPUs 16-33MHz bus frequency Flexible DRAM controller

Contextual Info: PCI 9060 * E PCI Bus Master Interface Chip for Adapters and Embedded Systems December, 1995 VERSION 1.2 Features General Description_ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local bus

js83

Abstract: 28f040 JS98 edo dram 72-pin simms 64mb JS108 JS-105 74LS373SC JS31-JS32 JS107 BYU25
Contextual Info: 32-bit 960Jx Galileo-5 Evaluation & Development Preliminary May 96, Rev. 1.0 System NOTE: Always contact Galileo Technology for possible updates before starting a design. FEATURES • Flexible evaluation, benchmark, software, and hardware development system for the GT-32090 System

Contextual Info: GT-96010 Remote Access Coprocessor Product Pre vie w Revision 0.59 i.p. 5/28/97 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES Integrated serial communications controller and system core logic device - Direct interface to i960 Jx family of CPUs

V96SSC25LP

Contextual Info: ‘ÌOOMEOO 0 0 0 0 3 0 3 ISA V96SSC • * * ▼ / Rev. BO HIGH-INTEGRATION SYSTEM CONTROLLER FOR ¡960 Sx/Jx AND PowerPC 401 Gx PROCESSORS • Direct interface to ¡960Sx/Jx and PPC401Gx processors • High-performance burst DRAM controller • Two-channel fly-by DMA controller

DAC1600

Abstract: SP10
Contextual Info: Gf Ni RAI IfSSlRI ME N! DAC1600 M IC R O PROCESSOR Dual Digital to Analog Converter DESCRIPTION The DAC1600 D igital to A n alog C onverter has been designed to serve as a pow erful, yet econ o m ic interface to a process co ntro l loop. The DAC1600 provides tw o 10-bit Pulse W idth M odulated

80960HA

Abstract: 80960JA 80960JD 80960JF 80960JT 80960RM 80960RN JT-100
Contextual Info: i960 JA/JF/JD/JS/JC/JT Microprocessors PRODUCT HIGHLIGHTS • Clock tripling technology ■ Large caches for faster performance ■ State of the art testability ■ i960® processor compatible RISC core ■ 100 MIPS execution for the i960 - JT-100 processors

j526

Abstract: Transistor J182 j182 J182 transistor j372 93-4J J306 78-j182 j179 j332
Contextual Info: 19-4786; Rev 1; 11/98 L MANUA ION KIT HEET T A U L EVA TA S WS DA FOLLO 400MHz to 2.5GHz, Low-Noise, SiGe Downconverter Mixers The MAX2680/MAX2681/MAX2682 miniature, low-cost, low-noise downconverter mixers are designed for lowvoltage operation and are ideal for use in portable communications equipment. Signals at the RF input port are

i960J

Contextual Info: V350EPC Rev. AO LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS Glueless interface to Intel’s ¡960Jx and IBM’s PowerPC 401 Gx processors Configurable for primary master, bus master or target operation. On-the-fly byte order endian conversion

amcc s5933

Abstract: amcc pci matchmaker amcc pci matchmaker S5933 S5933
Contextual Info: 80 TEP PACKAGE PINOUT APPLICATION BRIEF S5933 PCI MATCHMAKER — INTERFACING THE INTEL i960 Jx TO THE PCI BUS S5933 PCI MATCHMAKER — INTERFACING THE INTEL i960® Jx TO THE PCI BUS 1.0 AMCC S5933 PCI MATCHMAKER ARCHITECTURE 1.1.1 The best solution for interfacing to the PCI bus is an

fr10 diode

Contextual Info: fllL Micro Linear ^ June 1996 PR ELIM IN A R Y ML6035 5V Spindle Motor Controller and Driver GEN ERAL D ESCRIPTION FEATURES The M L6035 is a 5 volt brush less motor controller and driver. The circuit provides three phase sensorless com mutation and speed control. A digital commutation

Contextual Info: ^004200 □□□□102 MST • V961PBC •" V Rev. B1 LOCAL BUS TO PCI BRIDGE FOR i960 Jx AND PowerPC 401 Gx PROCESSORS " • Glueless interface between ¡960Jx, PPC401 Gx processors and the PCI bus • Large, 576-byte FIFOs using V3's unique D y n a m ic B a n d w id t h A l l o c a t i o n ™ architecture

Contextual Info: ÿ y : V96SSC Rev. B1 HIGH-INTEGRATION SYSTEM CONTROLLER FOR i960 Sx/Jx AND PowerPC 401 Gx PROCESSORS • Direct interface to i960Sx/Jx and PPC401 Gx processors • High-perform ance burst DRAM controller • Two-channel fly-by DMA controller • Serial com m unications unit

V360EPC

Abstract: 1gg7 Extended Sector Remapper V3 Semiconductor V350EPC design of dma controller using vhdl eeprom programmer schematic 24c02 V292PBC V960PBC V961PBC
Contextual Info: Chapter 1 Introduction In a very short period of tim e the PCI bus standard has moved beyond the PC to become the most w idely accepted high-performance bus standard for embedded applications. As a leader in providing chipset solutions for high-end embedded applications, V3 Sem iconductor

j526

Abstract: j182 J306 mark 34 dbm sot j332 Transistor J182 MAX2680 MAX2680EUT-T MAX2681 MAX2681EUT-T
Contextual Info: 19-4786; Rev 2; 8/03 KIT ATION EVALU E L B A AVAIL 400MHz to 2.5GHz, Low-Noise, SiGe Downconverter Mixers The MAX2680/MAX2681/MAX2682 operate from a single +2.7V to +5.5V supply, allowing them to be powered directly from a 3-cell NiCd or a 1-cell Lithium battery. These devices offer a wide range of supply

MPSC16

Contextual Info: HiL-sfllilpn ^sssss d 11 I v v . N O L □ G G T - 9 6 0 1 0 Remote Access Coprocessor Coorocc Preliminary Revision 1.0 8/ 12/97 Y Please contact Galileo Technology for possible updates before finalizing a design. FEATURES_ • Integrated serial communications controller and