AC118 Search Results

FIFO 32x8

Abstract: AC118
Contextual Info: Application Note AC118 Estimating Performance and Capacity of Actel Devices It is important to know, prior to getting too far into the design process, if a particular FPGA can implement the required application at the capacity and performance level of a target

74AC11827

Contextual Info: AC11827, AC11827 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS TI0155— 0 3 3 7 9 . NOVEMBER 1989— REVISED MARCH 1990 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers AC11827 . . . JT PACKAGE AC11827 . . . DW OR NT PACKAGE TOP VIEW

Contextual Info: AC11853, 74AC 11853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS TI0157— D3473, MARCH 1990 54AC11B53 . . . JT PACKAGE AC11853 . . . DW OR NT PACKAGE High-Speed Bus Transceivers with Parity Generator/Checker TOP VIEW Parity Error Flag Open-Drain Output • Register for Storage of the Parity Error Flag

54AC11181

Abstract: TI018
Contextual Info: 54AC11181, 74AC11181 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS T I0184— D 3119, APRIL 1989— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11181 . . . JT PACKAGE 74AC11181 . . . DW OR NT PACKAGE TOP VIEW Minimize High-Speed Switching Noise

d3376

Abstract: 74AC11828
Contextual Info: 54AC 11828, AC11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS TI0156— D 3376, NOVEMBER 1909— REVISED MARCH 1990 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers AC11828 . . . JT PACKAGE AC11828 . . . DW OR NT PACKAGE TOP VIEW

Contextual Info: AC11853, AC11853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS D3473, M ARCH 1990 AC11853 . . . JT PACKAGE AC11853 . . . DW OR NT PACKAGE High-Speed Bus Transceivers With Parity Generator/Checker TOP VIEW Parity-Error-Fiag Open-Drain Output U PARITY [ 1

AUO-PL321.15

Abstract: 54AC11181 74AC 74AC11181
Contextual Info: 54AC11181, 74AC11181 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS TI0184— D3119, APRIL 1989— REVISED MARCH 1990 54AC11181 . . . JT PACKAGE 74AC11181 . . . DW OR NT PACKAGE Flow-Through Architecture to Optimize PCB Layout TOP VIEW Minimize High-Speed Switching Noise

74AC11828

Abstract: 74AC 54AC11828 F-822 Y443
Contextual Info: TEXAS INSTR L06IC TII3 0 ^ 1 7 2 3 OOS'ìOm 4 3 IE D AC11828, AC11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS T ' 5 ^ - ' O q - 0 TI0156— D3376, NOVEMBER 1 9 8 9-R E V IS 60 MARCH 1990 AC11828 . . . JT PACKAGE AC11828 . . . DW OR NT PACKAGE

Contextual Info: AC11874,AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS _ D3446, MARCH 1990-REVISED OCTOBER 1990 3-State Buffer-Type Outputs Drive Bus Lines Directly AC11874 . . JT PACKAGE AC11874 . . DW OR NT PACKAGE {TOP VIEW

74AC11827

Contextual Info: 31E D TEXAS INSTR LOGIC fiRbITaS QDflTDOS 3 B T I I 3 AC11827, AC11827 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS n r - 5 ^ - o H - o o TI0155— D3379, NOVEMBER 1989—REVISEO MARCH 1990 AC11827 . . . J T PACKAGE AC11827 . . . DW OR NT PACKAGE

A61R

Contextual Info: THE CONNOR-WINFIELD CORP. 2111 COMPREHENSIVE DRIVE. AURORA, IL 60505. FAX 630 851-5040. PHONE (630) 851-4722. WWW.CONWIN.COM PRODUCT D AT A SHEET CRYSTAL CONTROLLED OSCILLATORS 8 Pin DIP Tri-State ACMOS Clock Oscillators ABSOLUTE M AXIMUM RATING S PARAMETER

54AC11874

Abstract: 74*874 74AC11874 AC1187
Contextual Info: AC11874, AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D3446, MARCH 1990-REVISED OCTOBER 1990 3-State Buffer-Type Outputs Drive Bus Lines Directly AC11874 . . . JT PACKAGE AC11874 . . . DW OR NT PACKAGE TOP VIEW Asynchronous Clear

AD118A

Abstract: AD-118A weinschel 8300-1 AE119A 1602001 09221 Weinschel 8200 AD9004 AD117A
Contextual Info: Weinschel Step Attenuators Manual, M otorized, & Programmable In this section of the catalog, each Step Attenuator is outlined ultilizing individual data sheets containing product features, specifications, and outline drawings. These data sheets are preceded by a quick reference

AL102 ATES

Abstract: 2N2222A mps KR206 AD149 TIS58 TIS88 SFT353 2N2431 2N4265 BFY29
Contextual Info: SECOND BOOK OF TRAISKTIR EQUIVALENTS AIR SPIRTITOTER IT I.I.OMMI BERNARD BABANI publishing LTD The Grampians Shepherds Bush Road London W67NF England. Although every care Is taken with the preparation of this book, the publishers will not be responsible

Contextual Info: Variable Attenuators Continuous Variable Attenuators.dc-4.2 GHz Model Number Frequency Range GHz Average Power (Watts) Peak Power (Watts) 1 940-60 1 940-114 dc-4.0 dc-2.0 5 500 Residual Maximum Insertion Attenuation Loss (dB) Range (dB) 6 Maximum SWR Connector

Contextual Info: PRECISION STAMPED: - i ri x ; iy , FLAG RIGHT ANGLE QUICK DISCONNECTS M ASTER DWG. M OUNTED IN PCB —1A I— M OUNTED IN PCB ^zzz^zzf^? <£zzzz^ 5 & n c D 7-23750-8-1 7-23540-8-1 7-23450-8 7-22950-8-1 A A B O THICKNESS (6.32mm) (16.81mm) (7,87mm) (15.70mm)

Contextual Info: BOBBIN TERMINALS TABS &. SPECIALIZED TERMINALS (TABS) • da Bobbin Terminals 7 -0 3 8 0 0 -5 / -8 n A 6 -2 2 7 8 0 -5 1 - l , A .ir r~ i— E-“ .248 A B C D E F THICKNESS .472 .866 (6.3Qmrn) (8.00mm)" (1 1.96mm) (22.(!)C)mm) .314 (7.9Smm) .315 BOBBIN HOLE

Contextual Info: Energy Start-Rs AC-118PNPF Type: Rapid Start Electronic Ballast Lamp Connection: Single Lamp Types: One 18 W CFQ/CFM SLI lamps or cross reference GE, Philips or Sylvania/OSRAM lamps SPECIFICATIONS Input Number Voltage of Lamps 120V 1 Lamp Type CFQ or CFM Lamp Input Watts Input Current Power

AD9011

Abstract: af115 af116 GPC-7 AE119A
Contextual Info: Variable Attenuators & Phase Shifters Weinschel C O R P O R A T I O N An MCE Company 101 Weinschel C O R P O R A T I O N General Information In this section of the catalog, each Manual Step/Variable Attenuator and Phase Shifter is outlined utilizing individual data

Contextual Info: PRECISION STAMPED TERMINALS TABS HORIZONTAL POST TERMINALS 6 -2 2 2 9 0 -6 6 -1 4 7 3 0 -8 an CE— V Hi 6- 1 4 3 6 2 -6 b Yu f THICKNESS (12.29mm) (0.64mm) (6.36mm) (0.72mm) (3.18mm) (3.05mm) (0.64mm) PCB HOLE .037 (0.94mm) REF. MACHINE t .453 (1 1.51mm)

Contextual Info: PRODUCT INDEX 54 54 54 55 54 54 54 55 54 54 55 55 54 54 55 54 55 54 53 53 53 55 48 51 48 50 53 55 50 58 48 58 48 50 51 48 51 48 49 58 48 49 58 48 49 49 48 48 49 49 58 48 58 49 48 48 49 58 55 50 50 48 50 48 48 49 53 53 48 49 53 53 n this 7-21270-8 7-21780-1

11802

Abstract: 54AC11802 74AC11802
Contextual Info: AC11802, AC11802 TRIPLE 4-INPUT OR/NOR LINE DRIVERS SCAS386 – D3718, JANUARY 1991 • • • • • • • • • • Less than 0.5-ns Skew Between True and Complementary Outputs High Capacitive-Drive Capability Curent Sink/Source Capability Up to 48 mA

Contextual Info: AC11833, AC11833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS T 10165— D 3448, MARCH 1990 High-Speed Bus Transceivers with Parity Generator/Checker 5 4A C 11 8 33 . . . J T P ACKA G E 7 4 A C 11833 . . . D W OR N T P ACKA G E TO P V IE W Parity-Error Flag Open-Draln Output

t1188

Contextual Info: AC11881, AC11881 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS TI0187— 0 3 4 7 9 , MARCH 1990 Full Look-Ahead for High-Speed Operations on Long Words 54AC11681 . . . JT PACKAGE AC11881 . . . OW OR NT PACKAGE TOP VIEW Arithmetic Operating Modes: Addition,